Source: IIT Hyderabad, Oak Ridge National Laboratory, Indiana University.
In deep sub-micron region, STT-RAM (spin transfer torque RAM) shows read-disturbance error (RDE) which presents acrucial reliability challenge. We present SHIELD, a technique to mitigate RDE in STT-RAM LLCs (last level caches). SHIELD uses datacompression to reduce cache-write trafﬁc and restore requirement. Also, SHIELD keeps two copies of data blocks compressed to lessthan half the block size and since several LLC blocks are only accessed once, this approach avoids several restore operations. SHIELDconsumes smaller energy than two previous RDE-mitigation techniques, namely high-current restore required read (HCRR, also calledrestore-after-read) and low-current long latency read (LCLL) and even an ideal RDE-free STT-RAM cache.
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