Author's Latest Posts


Blog Review: Jan. 18


Mentor's Michael White warns that while skipping a node can be appealing, be prepared for the increase in computation requirements. Synopsys' Hezi Saar checks out the benefits of moving to the MIPI I3C standardized sensor interface. Cadence's Paul McLellan highlights a talk by Eric Grosse on approaches to security and the RISC-V architecture. Applied's Mike Chudzik explains the problem... » read more

Power/Performance Bits: Jan. 17


Creating magnets with electricity Researchers at the SLAC National Accelerator Laboratory, Korea Advanced Institute of Science and Technology (KAIST), Korea Institute of Materials Science, Pohang University of Science and Technology, Max Planck Institute, and the University of New South Wales drew magnetic squares in a nonmagnetic material with an electrified pen and then "read" this magneti... » read more

The Week In Review: Design


M&A Synopsys acquired another code analysis company, Forcheck. A privately held software company based in the Netherlands, it provided a static analysis tool for detecting coding defects and anomalies in Fortran applications. Forcheck technology will be integrated into the Coverity tool. Terms of the deal were not disclosed. IP & Specifications Cadence launched verification IP ... » read more

Blog Review: Jan. 11


Mentor's Ron Press examines why test hasn't become a bottleneck in creating ever more advanced semiconductors. Synopsys' Graham Etchells warns that while finFET technologies have been successful, challenges persist. Cadence's Paul McLellan shares a behind-the-scenes look at developing the Palladium Z1 emulator. The White House's Craig Mundie and Paul Otellini highlight a PCAST report o... » read more

Power/Performance Bits: Jan. 10


Antiferromagnetic magnetoelectric RAM Researchers at Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Swiss Nanoscience Institute, and the University of Basel developed a concept for a new, low power memory chip. In particular, the group focused on finding an alternative to MRAM using magnetoelectric antiferromagnets, which are activated by an electrical voltage rather than by a current. "... » read more

The Week In Review: Design


IP Arastu Systems uncorked a LPDDR3 DRAM Memory Controller. The controller is fully compliant with JEDEC standard JESD209-3C and supports various power down modes as well as multiple channels with a privilege to configure and manage each channel independently and parameterized data width. CSEM's Bluetooth Low Energy silicon RF IP has been validated as Bluetooth 5 compatible. RF test equip... » read more

Blog Review: Jan. 4


Mentor's Harry Foster wraps up his functional verification study series with a look the impact of verification maturity and safety critical designs on first silicon success. Synopsys' David Benas argues for using the insurance industry as a model in assessing the risk of potential software flaws. Cadence's Tom Anderson shares highlights from the recent International Workshop on Microproce... » read more

Power/Performance Bits: Jan. 3


Paper-based bacteria battery Researchers at Binghamton University, State University of New York have created a bacteria-powered battery on a single sheet of paper that can power disposable electronics. The manufacturing technique reduces fabrication time and cost, and the design could revolutionize the use of bio-batteries as a power source in remote, dangerous and resource-limited areas. ... » read more

Power/Performance Bits: Dec. 27


Tiny diamond radio Researchers at Harvard built the world's smallest radio receiver, built out of an assembly of atomic-scale defects in pink diamonds. The radio uses tiny imperfections in diamonds called nitrogen-vacancy (NV) centers. To make NV centers, researchers replace one carbon atom in a diamond crystal with a nitrogen atom and remove a neighboring atom -- creating a system that i... » read more

The Week In Review: Design


M&A ARM reached further into the HPC space with its acquisition of Allinea Software, a provider of debug and performance analysis tools for HPC systems. Currently, 80% of the world's top 25 supercomputers use Allinea's tools, and ARM will continue supporting multiple processor architectures. Terms of the deal were not disclosed. PLDA Group is spinning out its QuickPlay C/C++ tool for ... » read more

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