Author's Latest Posts


Think Globally, Act Globally


For the last several months, I’ve been working on a series of articles about sustainable manufacturing in the semiconductor industry. How can we, as an industry, reduce our environmental footprint? It’s a big topic, and it’s been challenging to find concrete examples of ways fabs can reduce power consumption, water consumption, and greenhouse gas emissions. I’ll address these topics in ... » read more

Good Filters, Poor Resists


Shrinking feature sizes and more complex lithography schemes are increasing the pressure on all aspects of the lithography process, including resists and resist filtration. As Clint Haris, vice president and general manager for liquid micro contamination control at Entegris explained, fabs are pushing resist manufacturers toward more stringent control of both contaminants and “soft particl... » read more

Stacking Logic On Logic


Advanced packaging can be an alphabet soup of possible approaches, from heterogenous integration of multiple die types into a single package, to three-dimensional stacking of multiple dies on top of each other. Three-dimensional chip stacking is most commonly seen in memory devices. Applied to logic, though, there are at least two different ways for integration to proceed. Completely process... » read more

FD-SOI Strains For The Future


One of the challenges facing supporters of FD-SOI is the need to provide a pathway to improved performance. While FD-SOI wafers offer some significant advantages over bulk silicon wafers, performance enhancements like strain and alternative channel materials are more difficult to implement in the thin SOI environment. On the other hand, once a fab is willing to incorporate layer transfer techni... » read more

TSVs: Copper, Silicon, And CTE Mismatch


As previous articles in this series have discussed, advanced packages introduce new materials and new reliability concerns. Diffusion into solder bumps can create brittle, high resistance, intermetallic compounds. Heat transfer through an interposer can degrade the lifetime of even cool, low power chips. Still, through-silicon vias are unique in that they cut directly through the integrated cir... » read more

Electromigration: Not Just Copper Anymore


While integrated circuit manufacturers have worried about electromigration for a long time, until recently most of their concerns have focused on the on-chip interconnects. The larger dimensions found in integrated circuit packages have, in most cases, improved heat dissipation, reduced current density, and eliminated most [getkc id="160" kc_name="electromigration"] risks. Over the last sev... » read more

Building A Better Resonator


The resonant frequency of a beam depends on the mass and stiffness of the beam. Resonance has always been important in the design of musical instruments and amplification systems, as well as the design of bridges and buildings. With the advent of MEMS fabrication techniques, though, came the ability to create very small beams, in the micron or nanometer size range, with resonant frequencies... » read more

Keeping The Whole Package Cool


Heat dissipation is a critical issue for designers of complex chip-stacking and system-in-package devices. The amount of heat generated by a device increases as the number of transistors goes up, but the ability to dissipate the heat depends on the package surface area. Because the goal of 3D packaging is to squeeze more transistors into less overall space, new heat dissipation issues are em... » read more

Improving Transistor Reliability


One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

Quantum Computing Breakthrough


An earlier series of articles on quantum computing discussed the differences between the gate logic model and the quantum annealing model. The gate logic model, like transistor logic, uses a limited number of “gates” to construct a general purpose computer, theoretically capable of solving any problem for which a suitable algorithm can be found. In systems designed around the gate logic mod... » read more

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