Author's Latest Posts


TSVs: Copper, Silicon, And CTE Mismatch


As previous articles in this series have discussed, advanced packages introduce new materials and new reliability concerns. Diffusion into solder bumps can create brittle, high resistance, intermetallic compounds. Heat transfer through an interposer can degrade the lifetime of even cool, low power chips. Still, through-silicon vias are unique in that they cut directly through the integrated cir... » read more

Electromigration: Not Just Copper Anymore


While integrated circuit manufacturers have worried about electromigration for a long time, until recently most of their concerns have focused on the on-chip interconnects. The larger dimensions found in integrated circuit packages have, in most cases, improved heat dissipation, reduced current density, and eliminated most [getkc id="160" kc_name="electromigration"] risks. Over the last sev... » read more

Building A Better Resonator


The resonant frequency of a beam depends on the mass and stiffness of the beam. Resonance has always been important in the design of musical instruments and amplification systems, as well as the design of bridges and buildings. With the advent of MEMS fabrication techniques, though, came the ability to create very small beams, in the micron or nanometer size range, with resonant frequencies... » read more

Keeping The Whole Package Cool


Heat dissipation is a critical issue for designers of complex chip-stacking and system-in-package devices. The amount of heat generated by a device increases as the number of transistors goes up, but the ability to dissipate the heat depends on the package surface area. Because the goal of 3D packaging is to squeeze more transistors into less overall space, new heat dissipation issues are em... » read more

Improving Transistor Reliability


One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

Quantum Computing Breakthrough


An earlier series of articles on quantum computing discussed the differences between the gate logic model and the quantum annealing model. The gate logic model, like transistor logic, uses a limited number of “gates” to construct a general purpose computer, theoretically capable of solving any problem for which a suitable algorithm can be found. In systems designed around the gate logic mod... » read more

Many Paths To Hafnium Oxide


Equipment and materials suppliers often talk about the fragmentation of integrated circuit processing. While the number of manufacturers has gone down, the diversity of the underlying semiconductor market has increased. Low-power processors for mobile devices, non-volatile memory for solid state disks, and dedicated graphics processors all have different requirements from the traditional ind... » read more

Managing ALD Effluent


Process designers tend to not think very much about the waste gases from their processes. The chamber exhaust sends the effluent gases to the fab scrubbers, and that is pretty much that. Except when it’s not. It turns out that the design of the ALD process can make life significantly more challenging for the chamber exhaust pumps. In atomic layer deposition, the first precursor gas, su... » read more

EUV Resists Move Forward


Improvements in EUV exposure sources and exposure tools are shifting the industry’s focus to other components of the lithography process. As noted last year, one of the key areas is photoresists. But advanced photoresists face significant challenges, due to the need to balance sensitivity, etch selectivity, and resolution. This year’s SPIE Advanced Lithography conference featured promis... » read more

Internet of FD-SOI Things?


Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

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