Author's Latest Posts

Merging Power and Arithmetic Optimization Via Datapath Rewriting (Intel, Imperial College London)
By Technical Paper Link - 19 Apr, 2024 - Comments: 0

A new technical paper titled "Combining Power and Arithmetic Optimization via Datapath Rewriting" was published by researchers at Intel Corporation and Imperial College London. Abstract: "Industrial datapath designers consider dynamic power consumption to be a key metric. Arithmetic circuits contribute a major component of total chip power consumption and are therefore a common target for p... » read more

RF General-Purpose Photonic Processor
By Technical Paper Link - 17 Apr, 2024 - Comments: 0

A new technical paper titled "General-purpose programmable photonic processor for advanced radiofrequency applications" was published by researchers at Universitat Politècnica de València and iPronics. Abstract "A general-purpose photonic processor can be built integrating a silicon photonic programmable core in a technology stack comprising an electronic monitoring and controlling layer ... » read more

Memristor Crossbar Architecture for Encryption, Decryption and More
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "Tunable stochastic memristors for energy-efficient encryption and computing" was published by researchers at Seoul National University, Sandia National Laboratories, Texas A&M University and Applied Materials. Abstract "Information security and computing, two critical technological challenges for post-digital computation, pose opposing requirement... » read more

Single-Molecule Transistor Using Quantum Interference
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "Quantum interference enhances the performance of single-molecule transistors" was published by researchers at Queen Mary University of London, University of Oxford, Lancaster University, and University of Waterloo. Abstract "Quantum effects in nanoscale electronic devices promise to lead to new types of functionality not achievable using classical electronic co... » read more

Feasibility and Potential of Quantum Computing For a Typical EDA Optimization Problem
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "QCEDA: Using Quantum Computers for EDA" was published by researchers at Fraunhofer IESE, RPTU Kaiserslautern, DLR (Germany), and OTH Regensburg. Abstract "The field of Electronic Design Automation (EDA) is crucial for microelectronics, but the increasing complexity of Integrated Circuits (ICs) poses challenges for conventional EDA: Corresponding problems are of... » read more

Imaging of Coupled Film-Substrate Elastodynamics During an Insulator-to-Metal Transition (Penn State, et al.)
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "In-Operando Spatiotemporal Imaging of Coupled Film-Substrate Elastodynamics During an Insulator-to-Metal Transition" was published by researchers at Pennsylvania State University, Cornell University, Argonne National Lab, Georgia Tech and Forschungsverbund Berlin. Abstract "The drive toward non-von Neumann device architectures has led to an intense focus on ins... » read more

In-Memory Computing: Techniques for Error Detection and Correction
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "Error Detection and Correction Codes for Safe In-Memory Computations" was published by researchers at Robert Bosch, Forschungszentrum Julich, and Newcastle University. Abstract "In-Memory Computing (IMC) introduces a new paradigm of computation that offers high efficiency in terms of latency and power consumption for AI accelerators. However, the non-idealities... » read more

Hardware Fuzzer Utilizing LLMs
By Technical Paper Link - 12 Apr, 2024 - Comments: 0

A new technical paper titled "Beyond Random Inputs: A Novel ML-Based Hardware Fuzzing" was published by researchers at TU Darmstadt and Texas A&M University. Abstract "Modern computing systems heavily rely on hardware as the root of trust. However, their increasing complexity has given rise to security-critical vulnerabilities that cross-layer at-tacks can exploit. Traditional hardware ... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS
By Technical Paper Link - 10 Apr, 2024 - Comments: 0

A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Chiplet Hardware Security Module To Mitigate Security Vulnerabilities In SiP Systems (Univ. of Florida)
By Technical Paper Link - 09 Apr, 2024 - Comments: 0

A new technical paper titled "Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration" was published by researchers at University of Florida (Gainesville). Abstract: "The semiconductor industry has adopted heterogeneous integration (HI), incorporating modular intellectual property (IP) blocks (chiplets) into a unified syst... » read more

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