Author's Latest Posts


Automation And Correct By Construction Will Empower 3D-IC Adoption


When research on 3D ICs was in full swing around 2009, I had been researching on how through-silicon-via (TSV) was related to thermal in a semiconductor chip-making company, and it seemed logical that 3D ICs would become mainstream. However, during the past 10 years, use of 3D stacked die has been applied to only a few applications, such as memory or image sensors, and the 2.5D solution using i... » read more

7nm Design Success Necessitates A Multi-Physics Approach


Whether you are designing an energy efficient mobile device, or an ADAS platform with stringent reliability requirements, or a high performance enterprise networking system, chips fabricated on advanced technologies such as 7-nanometer (nm) process and 2.5/3D or wafer level packaging can provide several advantages. Designs using these technologies consume less power while delivering higher thro... » read more

Why Do You Need Chip-Package-System Co-Design And Co-Analysis?


Whether it is the need for sustainable energy, or driving performance while keeping power at bay, or enabling safe and reliable operation of any electronic system, containment of electronic noise — power and signal noise is critical to all of the above. Other factors that impact safe and reliable operation are electromigration (EM), electromagnetic interference (EMI) and mechanical stress ena... » read more