Five engineering breakthroughs; design complexity and its consequences; specialty memories; considering TSVs; MIT’s power converter chip; CoreSight debug; the future of CFD.
From 7nm to steel that’s stronger than steel, there have been a wave of breakthrough announcements this week. Ansys’ Bill Vandermark rounds them up in his top five engineering articles.
In a new video, Cadence’s Lou Ternullo takes a closer look at what to consider when you are considering specialty memories, such as Wide I/O, HBM, and HMC.
Synopsys’ Marc Greenberg examines Samsung’s new 3D Stacked DDR4 DIMMS using Through Silicon Vias (TSVs), the price differential on TSV stacked devices, and why to consider them.
Rambus’ Aharon Etengoff takes a look at the efficient power converter chip recently developed by MIT and its potential for sensors in the IoT.
In a continuing series, ARM’s Eoin McCann digs into a technical introduction of the ARM CoreSight debug & trace technology and architecture.
CFD and simulation have a very bright future, says Ansys’ Gilles Eggenspieler, and presents his vision for where it is headed.
If you missed last week’s Low Power-High Performance newsletter, check out the featured blogs:
Editor In Chief Ed Sperling looks at the implications of the 7nm breakthrough by IBM, GlobalFoundries and Samsung.
Executive Editor Ann Steffora Mutschler questions how to improve verification.
Mentor’s Robin Bornoff observes that thermal simulation provides more than an indication of operating temperatures—including insights into the physics of heat removal in a particular application as well as better decisions for a product’s thermal design.
Rambus’ Loren Shalinsky contends that server market growth continues, despite the misleading statistics.
Atrenta’s Kiran Vittal finds that static checks are a good supplement to simulation-based verification.
Synopsys’ Ralph Grundler notes that some designers prefer to buy controllers and PHYs separately, but many are now asking for pre-verified interface IP subsystems.