lll-V power devices; verification complexity; finFET primer; UPF 3.0; the DDR PHY Interface; RISC-V.
Are wide bandgap lll-V power devices feasible? Applied’s Ben Lee considers the challenges, and potential rewards, of silicon carbide and gallium nitride.
DVCon India chair Gaurav Jalan chats with keynote speaker Alok Jain about the challenges of verifying complex SoCs, the unique verification needs of the IoT, and what might lie beyond UVM.
From power intent abstraction to automatic power state coverage, Mentor’s Joe Hupcey III highlights three things to know about UPF 3.0.
Synopsys’ Deepak Gupta checks out the DDR PHY Interface and when it’s required for interoperability.
Cadence’s Paul McLellan checks out what’s new with SiFive, a startup that placed their bets on selling RISC-V chips.
A blog from Lam Research delves into the fundamentals of finFETs and some of the key process challenges in creating the structures.
The future looks rosy for mobile payments, says Rambus’ Aharon Etengoff: forecasts project annual spend via Apple Pay and Android Pay will grow to $8 billion in 2018, from $540 million this year.
ARM’s Paul Williamson sees Apple’s removal of the headphone jack, partnered with the latest Bluetooth standard, as a game changer for the wireless audio market.
On the other hand, Semico’s Adrienne Downey contends that the iPhone 7 announcement inspired more questions than it answered.
Ansys’ Tom Smithyman celebrates Star Trek by looking at how it inspired today’s technology.
NXP’s Donnie Garcia shares some impressive projects from a contest involving the company’s FlexIO peripheral.
Plus, check out the blogs featured in last week’s Low Power-High Performance newsletter:
Editor in Chief Ed Sperling contends that raw performance is getting harder to prove, which is a problem.
Executive Editor Ann Steffora Mutschler questions whether there is really as much divisiveness as there appears when it comes to power.
Mentor Graphics’ Harry Foster uncorks this year’s industry-wide study of verification trends.
ARM’s Andrew Hopkins points to the growing importance of functional safety as cars add more safety features.
Cadence’s Christine Young provides details about what’s needed in a power-aware verification flow.
Teklatech’s Tobias Bjerregaard argues that power integrity challenges stand in the way of exploiting the benefits of scaling.
Ansys’ Muhammad Zakir finds that with the transition to finFETs, reliability challenges are increasing.