HBM2: It’s All About The PHY


HBM DRAM is currently used in graphics, high-performance computing (HPC), server, networking and client applications. HBM, says JEDEC HBM Task Group Chairman Barry Wagner, provides a “compelling solution” to reduce the IO power and memory footprint for the most demanding applications. Recent examples of second-generation HBM deployment include NVIDIA’s Quadro GP100 GPU which is paired wit... » read more

The Challenges Of Designing An HBM2 PHY


Originally targeted at the graphics industry, HBM continues to gain momentum in the server and networking markets as system designers work to move higher bandwidth closer to the CPU. Expanding DRAM capacity – which boosts overall system performance – allows data centers to maximize local DRAM storage for wide throughput. HBM DRAM architecture effectively increases system memory bandwidth... » read more

The Challenges Of Designing 28G And 56G SerDes IP


The industry move to 56 Gbps PAM4 is undoubtedly one of the greatest challenges currently facing SerDes IP designers and their customers. To begin with, shifting to 56 Gbps PAM4 immediately causes a loss of 9 dB. While the baud rate is 28 Gbaud, there are now three eyes stacked on top of each other. Nevertheless, there is still demand for 35+ dB reach. This is a significant challenge which requ... » read more

What Comes After Moore’s Law And Dennard Scaling?


For decades, Moore’s Law has been an important semiconductor industry mainstay that has helped fuel a relentless progression in computing performance. However, most industry experts agree that Moore’s Law is waning, with an end on the horizon due to a combination of physical limitations and economic factors. With the loss of Dennard Scaling roughly 10 years ago, the industry is at a critica... » read more

Faster SerDes For More Efficient Data Centers


The evolving data center presents an imposing set of challenges for system architects as Dennard Scaling fades and Moore’s Law wanes. These include an exponential increase in data, shifting architectural bottlenecks and a never-ending demand for higher performance within the same power and thermal envelopes. The Internet of Things (IoT), Big Data analytics, in-memory computing and machine ... » read more

From The Data Center To The Mobile Edge


At the heart of the Internet of Things is the complex interplay between the needs for both low power and high performance (LPHP), a perplexing challenge rooted in the de-facto bifurcation of the IoT itself. For example, lower power mobile devices, systems and lite endpoints make up the vast majority of forward-facing consumer infrastructure, while high-performance servers at the back end are ta... » read more

Architecting Memory For Next-Gen Data Centers


The industry’s insatiable appetite for increased bandwidth and ever-higher transfer rates is driven by a burgeoning Internet of Things (IoT), which has ushered in a new era of pervasive connectivity and generated a tsunami of data. In this context, datacenters are currently evaluating a wide range of new memory initiatives. All seek to optimize efficiency by reducing data transport, thus sign... » read more

Shifting Performance Bottlenecks Driving Change In Chip And System Architectures


The rise of personal computing in the 1980s — along with graphical user interfaces (GUIs) and applications ranging from office apps to databases — drove the demand for faster chips capable of removing processing bottlenecks and delivering a more responsive end-user experience. Indeed, the semiconductor industry has certainly come quite a long way since IBM launched its PC way back in 1981. ... » read more

Addressing Modern Bottlenecks With Smart Data Acceleration


Over the past 30 years, the relentless progression of Moore’s Law has driven dramatic improvements in transistor counts and ultimately in processor performance. CPU performance was often the primary factor in determining overall system performance, leading us to believe that better CPUs led to better system performance. But, as processors have become more powerful, other subsystems have not k... » read more

Which Memory Type Should You Use?


I continue to get besieged by statements in which memory “latency” and “bandwidth” get misused. As I mentioned in my last blog, latency is defined as how long the CPU needs to wait before the first data is available, while bandwidth is how fast additional data can be “streamed” after the first data point has arrived. Bandwidth becomes a bigger factor in performance when data is stor... » read more

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