Multiple Dimensions Of Low-Power Verification With Portable Stimulus


There is little doubt that designing for low power is one of the biggest challenges for today’s system-on-chip (SoC) devices. The need to minimize power consumption is clear for the vast array of portable electronic devices that we use every day. Consumers expect most of their gadgets to last multiple days before they require recharging, and low-power design is the key to extending battery li... » read more

Verification Of Low-Power Designs With Portable Stimulus


In a recent blog post, Steve Carlson talked about the use of software-driven tests to support concurrent power and performance analysis. Generation of software-driven tests is one of the key technologies that will be enabled by the upcoming standard from Accellera's Portable Stimulus Working Group (PSWG). Portable stimulus spans functional verification as well as performance validation, so PSWG... » read more

What’s The Real Benefit Of High-Level Synthesis?


Once upon a time, “behavioral synthesis,” the precursor to high-level synthesis, hung its hat on design productivity as its sole value. By that, I mean, if a behavioral synthesis tool provides a high enough productivity benefit, designers or design managers will boil the ocean to move to it. There was little methodology around it. In fact, even the design entry language was unfamiliar. Yes,... » read more

How Software-Driven Tests Support Concurrent Power/Performance Analysis


There’s always been an intimate relationship between performance and power—and it’s one that is acutely affected by architecture. Architectural innovation can yield orders of magnitude improvements in performance/power metrics. For example, we’ve seen a growing popularity in multi-core and heterogeneous core systems with purpose-specific hardware accelerators. These configurations are o... » read more

Managing Power Without Impacting Design Intent


The good news is that there are many techniques available to optimize power in your design. The not-so-good news? Many of these power management techniques also create new complexities in the physical and functional behavior of electronic designs. Fortunately, there’s more good news: implementing a power-aware verification methodology can help you verify power optimization without detracti... » read more

The Role Of Energy-Efficient Circuits In Wearable Healthcare Applications


As beneficial as they are, health monitors for conditions like high blood pressure, arrhythmia, and epilepsy can be uncomfortable and inconvenient due to all of their protruding wires. This opens up an opportunity for designers of wearable healthcare applications. “Wearable electronics are needed for proactive healthcare,” said Dr. Jerald Yoo, an associate professor in the Department of ... » read more

Designing Power-Efficient, Implantable Medical Devices


Medical devices used for treatment traditionally tend to be big, bulky, and full of wires, making them uncomfortable or inconvenient for the patient to use. For Dr. Rikky Muller and Cortera Neurotechnologies, power-efficient, implantable medical devices provide a viable alternative. Muller is an assistant professor of electrical engineering and computer sciences at UC Berkeley. She is also a... » read more

2016 And Beyond


Greek mythology and Roman history are replete with soothsayers, some of whom got it right and others wrong. Cassandra was cursed that her predictions wouldn’t be believed, even though she predicted the Trojan horse. Caesar’s soothsayer predicted the demise of Julius Caesar during the Ides of March, which Caesar himself was skeptical about, but indeed he was murdered before the Ides passed. ... » read more

Is it Hot? Ask Joules


Over the last decade it has become clear that power reduction techniques involving different parts of the chips would become more important than they had historically. In 2G cell phones everything except the real-time clock could be turned off when the phone was not in use. Pre-smartphones, a phone was either making a call (or texting, gaming, etc.) or it was off. In fact, a cell phone can’t ... » read more

Two Constraints-Based Techniques To Address Power-Related Challenges In SoC Design


Power scheduling, power integrity targets, voltage drop—these are just a few of the power-related challenges you’re no doubt managing in your SoC designs. There aren’t any easy answers, but there are some emerging—and promising—techniques. Two such techniques, according to University of Toronto Professor Farid Najm, are constraints generation and constraints-based verification. “... » read more

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