Extending Power Analysis To The Emulation of Complex SoCs

Using hardware emulation to estimate SoC power consumption delivers significant value. Emulators are capable of long runs on large designs, making it practical to emulate an RTOS boot sequence or graphics processing of multiple frames. Estimating power consumption of these advanced functions executing across the complete SoC provides valuable insight into the chip’s power draw and its impact ... » read more



The Revolution Will Not Be Televised: It Will Be On Your Phone

The advent of smart devices has ushered in a revolution all over the world. The most widely used smart device is the mobile phone, which has radically changed the way we communicate. There are many other types of devices running 24/7 in our homes, hospitals, businesses, etc. No matter what kind of functionality smart devices have, they have one thing in common: they all consume energy. They ... » read more



As Nodes Advance, So Must Power Analysis

By Chetandeep Singh and Ravi Tangirala Smaller geometry nodes offer cost and performance advantages that encourage their adoption. Yet they present a new set of challenges for IC manufacturers: Though transistors are smaller, they leak more current. This is an important issue as the demand for high-performance, battery-operated, system-on-chips (SoC) in communication and computing shifts th... » read more



Power Management Considerations For Efficient Embedded Systems Development

Usable product life is a critical factor in the success of any portable device, and managing power efficiency is a key requirement for embedded systems today. Historically, power management was seen as a “hardware problem” that plagued development teams, but with today’s sophisticated devices and more specialized hardware, this impacts the software developer, as well. One reason for this ... » read more



A High-Level ‘How To’ Guide For Effective Chip-Package Thermal Co-Design

By John Parry and Byron Blackmore Concurrent design of a chip and its packaging environment is becoming more important than ever for several reasons. Designing a large, high power die, e.g. a System-on-Chip (SoC), without considering how to get the heat out is likely to lead to problems later on, resulting in a sub-optimal packaging solution from cost, size, weight and performance perspective... » read more



Power Grid Simulation

Introduction The underlying solver algorithms used in power grid (PG) simulation today are derivations of circuit simulation algorithms first developed many decades ago. In fact, the 40th anniversary of SPICE (a widely used circuit simulator), was celebrated in 2011. As such, it is understandable that many engineers have a jaundiced view towards claims of improved PG simulation performance. Ne... » read more



Stimuli-Driven Power Grid Analysis

The terms vector and vectorless modes are commonly used in the context of dynamic power grid (PG) analysis, but what do these terms mean? The PG dynamic simulator uses a design’s activity suite to compute the voltages and currents in the PG network. In vector mode, logic simulation is used to generate the complete activity suite. Vector mode is typically referred as a VCD (Value Change Dump).... » read more



Power Grid Analysis—Challenges At 20nm And Below

Introduction The need for power grid analysis (PGA) emerged in the early 2000s, when leading-edge semiconductor companies were starting 90nm designs that unveiled new technical challenges. Since then, PGA has coped with diverse challenges for each new technology node, including coverage (dynamic PGA emerged in the mid-2000s), performance, and capacity (a bottleneck at the 32/28nm node). But 20... » read more



3D-IC Requires Expanded Power Grid Analysis

At advanced nodes, effective power grid analysis is critical to ensure that the small dimension interconnects can handle current demands without introducing potential failure modes or signal integrity issues. Existing software tools for power analysis need to be extended and enhanced for 2.5D and 3D designs to fulfill new requirements and use models. This article describes some of the needed im... » read more



Mobile Technology Unchained

Smart phones and tablets mandate that designers place equal, if not more, emphasis on optimizing power consumption. Everyone wants a fast device, high resolution graphics, and light weight, but they don’t want to be chained to their battery chargers. Reducing power consumption is high on everyone’s list. There are several different approaches to reduce power consumption and thereby produ... » read more



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