A High-Level ‘How To’ Guide For Effective Chip-Package Thermal Co-Design

By John Parry and Byron Blackmore Concurrent design of a chip and its packaging environment is becoming more important than ever for several reasons. Designing a large, high power die, e.g. a System-on-Chip (SoC), without considering how to get the heat out is likely to lead to problems later on, resulting in a sub-optimal packaging solution from cost, size, weight and performance perspective... » read more

Power Grid Simulation

Introduction The underlying solver algorithms used in power grid (PG) simulation today are derivations of circuit simulation algorithms first developed many decades ago. In fact, the 40th anniversary of SPICE (a widely used circuit simulator), was celebrated in 2011. As such, it is understandable that many engineers have a jaundiced view towards claims of improved PG simulation performance. Ne... » read more

Stimuli-Driven Power Grid Analysis

The terms vector and vectorless modes are commonly used in the context of dynamic power grid (PG) analysis, but what do these terms mean? The PG dynamic simulator uses a design’s activity suite to compute the voltages and currents in the PG network. In vector mode, logic simulation is used to generate the complete activity suite. Vector mode is typically referred as a VCD (Value Change Dump).... » read more

Power Grid Analysis—Challenges At 20nm And Below

Introduction The need for power grid analysis (PGA) emerged in the early 2000s, when leading-edge semiconductor companies were starting 90nm designs that unveiled new technical challenges. Since then, PGA has coped with diverse challenges for each new technology node, including coverage (dynamic PGA emerged in the mid-2000s), performance, and capacity (a bottleneck at the 32/28nm node). But 20... » read more

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3D-IC Requires Expanded Power Grid Analysis

At advanced nodes, effective power grid analysis is critical to ensure that the small dimension interconnects can handle current demands without introducing potential failure modes or signal integrity issues. Existing software tools for power analysis need to be extended and enhanced for 2.5D and 3D designs to fulfill new requirements and use models. This article describes some of the needed im... » read more

Mobile Technology Unchained

Smart phones and tablets mandate that designers place equal, if not more, emphasis on optimizing power consumption. Everyone wants a fast device, high resolution graphics, and light weight, but they don’t want to be chained to their battery chargers. Reducing power consumption is high on everyone’s list. There are several different approaches to reduce power consumption and thereby produ... » read more

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Embedded Memory Impact On Power Grids

Introduction Due to the overwhelming technical advantages of having on-chip memories, embedded memories are ubiquitous in most chip designs, and can comprise significant portions of a chip (upwards of 50%, according to some authors). Accordingly, a chip’s power grid design and analysis must account for the impact of these embedded memories, but design teams often struggle to resolve power... » read more

Power Grid Analysis

By Christen Decoin With increasing design size at each technology node, power grid analysis (PGA) has been stretching established software capacity and performance for some time. At 32/28nm, capacity and performance issues finally presented significant barriers to achieving signoff. In this article, we explore existing approaches that EDA vendors have been trying to leverage to work around ... » read more

EM Analysis At Advanced Nodes

Going forward, a very different method of EM assessment can be proposed if we look at interconnect reliability from the position of its functionality, when the failure of the interconnect means its inability to function properly. The two most important functions of the chip interconnect are: Providing connectivity between different parts of design for proper signal propagations (signal circ... » read more

EM Analysis At Advanced Nodes

EM statistics Almost 50 years ago, James Black demonstrated experimentally that TTF of the metal line stressed by direct current (DC) of density j at the temperature T follows the dependency where k is the Boltzmann constant, and A is the proportionality coefficient, which can depend on line geometry, residual stress, and temperature. Two critical parameters, the current density exponen... » read more

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