Welcome Verification 3.0


Leave it to Jim Hogan, managing partner of Vista Ventures, to look further out at the changing horizon of verification than the rest of us and to make sense of it in what he calls Verification 3.0. In his executive summary, he outlined the significant advancements in functional verification over the past 20 years, such as hybrid verification platforms in Verification 1.0 and hardware/software c... » read more

The 3D Printing Revolution


3D printing always has been intriguing. More recently, it has become truly useful. And in the near future, it will become increasingly controversial. There are videos on YouTube documenting entire homes that are being printed in as little as 8 hours, priced as low as $4,000. So while there is a lot of buzz about AI eliminating jobs, 3D printing could add become another significant threat. ... » read more

Commoditizing Constraints


Preparing articles for Semiconductor Engineering involves talking to a lot of people and then trying to fit their statements together in a way that is logical and fair. Sometimes a subject will come up in one of these calls that is not really on topic, but is still interesting. One such incident happened this week while doing research for the Verification 3.0 article. The topic was constrain... » read more

Making Declarative Modeling Modular: Portable Stimulus Introduces Dynamic Constraints


Naturally, Accellera’s Portable Stimulus Standard (PSS) supports the powerful capabilities of advanced verification techniques that are well-known in the industry today, including object-oriented composition and constrained-random stimulus. But the PSS also supports a new constraint capability, called dynamic constraints. Dynamic constraints support the critical mission of the PSS by makin... » read more

Electronic System-Level Design: Are We There Yet?


I am writing this while attending NI Week in Austin and am admittedly wowed by National Instruments’ open test platform. NI Week’s theme is “Developing the Future Faster.” The Tuesday keynote included guest speakers from Mazda, Honeywell, and NXP, and these were great examples of system-level design of different scopes, from cars to distributed systems to chips enabling them. Personally... » read more

A Combined Design And Verification Flow For Safety-Critical Designs


By Tom Anderson and Srikanth Rengarajan I welcome my co-author for today’s post, Srikanth Rengarajan, vice president of product and business development from Austemper Design Systems. We would like to focus on safety-critical designs, a topic very much in the news these days because of the public’s fascination with autonomous vehicles. This consumer category now joins medical electron... » read more

First Look At USB 3.2


I’m super excited to write about and show to you the world’s first USB 3.2 demonstration. Go watch the video first and then read the rest. https://youtu.be/WPUvHeq_Sgs USB 3.2 hardware and software setup We implemented our USB 3.2 Device and Host in the HAPS-80 FPGA-Based hardware prototyping platform. The platforms use USB PHYs, which are implemented in a FinFET process node. ... » read more

Speeding Up High-Frequency Trading


The High-Frequency Trading (HFT) industry has received a lot of attention during the last few years. HFT is all about speed and minimizing latency: the faster you can run trading strategies and algorithms for analyzing minute price changes and executing trade orders, the higher the probability to win over competition. So the competition in this area is very fierce with market players continuous... » read more

Re-Engineering Humanity


The technology industry is comfortable with trends that increase linearly for decades—and many that follow quadratic curves, also seemingly forever. Moore's Law and the rate of adoption of new technologies are two examples that come to mind. Those same trends can be used to scare or even create panic amongst a less informed general public. Such is the case with Artificial Intelligence (AI)... » read more

The Great Chip Shakeup


Facebook, Alibaba, Google, Apple and Samsung are all designing their own chips. So are Cisco and Huawei. So what exactly does this mean for big chipmakers and the semiconductor ecosystem? While your first impulse might be to draw a straight line between Qualcomm's decision to cut 1,500 jobs and reports about giant systems companies developing chips in-house, it's not clear there is any corre... » read more

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