Welcome Verification 3.0


Leave it to Jim Hogan, managing partner of Vista Ventures, to look further out at the changing horizon of verification than the rest of us and to make sense of it in what he calls Verification 3.0. In his executive summary, he outlined the significant advancements in functional verification over the past 20 years, such as hybrid verification platforms in Verification 1.0 and hardware/software c... » read more

A Combined Design And Verification Flow For Safety-Critical Designs


By Tom Anderson and Srikanth Rengarajan I welcome my co-author for today’s post, Srikanth Rengarajan, vice president of product and business development from Austemper Design Systems. We would like to focus on safety-critical designs, a topic very much in the news these days because of the public’s fascination with autonomous vehicles. This consumer category now joins medical electron... » read more

Why Your FPGA Synthesis Flow Requires Verification


When you think about it, logic synthesis is a vital but rather intimidating part of modern chip design. This process takes a high-level description of intended functionality, written in an RTL language that looks more like software than hardware, and implements it using the low-level building-block library of an ASIC or FPGA device. The resulting gate-level netlist must meet a variety of requir... » read more

Asterix In The Land Of Sudoku: The Fast, The Elegant, And The Popular Formal Solvers


It has become a time-honored tradition for OneSpin to pose a holiday puzzle challenge to engineers everywhere. Last year, we asked you to solve the famous Einstein riddle using assertions and a formal tool: It was a great success. For the 2017–18 holiday season, we asked you to solve the hardest Sudoku in the world and prove that the solution is unique. We are delighted that even more enthusi... » read more

Making Sense Of Safety Standards


If you’re involved in the design or verification of safety-critical electronics, you’ve probably heard about some of the standards that apply to such development projects. If not, then you’re probably puzzled when you read about TÜV SÜD certifying that an EDA tool satisfies functional safety standards ISO 26262 (TCL3/ASIL D), IEC 61508 (T2/SIL 3) and EN 50128 (T2/SIL 3). The industry ha... » read more

Formal In The Spotlight


Who doesn’t like a great family picture during the festive season? Of course, those occasions call for reasonably elegant attire. When in the spotlight, most people like to get somewhat more formal. It seems that in the semiconductor world, it’s the reverse. As formal verification transitioned from a niche technology to mainstream over the past few years, formal verification engineers an... » read more

Using Formal To Solve The World’s Hardest Sudoku


It’s no secret that the OneSpin team loves contests. Last year around this time, we set a challenge to engineers everywhere: solve the famous Einstein’s Riddle using a formal tool. After an enthusiastic response, we decided to make the holiday puzzle an annual event, with a different subject area each year. Our engineering team was challenged to come up with a new topic, and my idea, whi... » read more

The Uncontrolled Rise Of Functional Safety Standards


Over the past 30 years, advances in software and hardware have made it possible to create sophisticated systems controlling crucial aspects of complex equipment, from rolling and pitching in aircrafts, to steering and braking in cars. The processes and methods defined in functional safety standards are crucial to ensure that these systems behave as expected and safely, even when certain parts ... » read more

Look Ma, No Hands! Functional Safety From The Driver’s Seat


Every so often, I undertake a project that reminds me why I love working in semiconductor marketing. Back in August, I hopped behind the wheel of a Tesla Model X to film a video for OneSpin about how formal verification can help designers to satisfy the ISO 26262 automotive safety standard. If you haven't yet seen the video, you can watch it here: http://bit.ly/2ycK5Yp The Model X itself was... » read more

DVCon Europe Takes Over Munich October 16-17


DVCon Europe is on the horizon, and this year's program should prove to be very timely. Chips and systems are getting more complex, verification is becoming more difficult, and formal has emerged as a critical piece of the verification suite The lineup this year tackles some key issues facing a changing semiconductor landscape. During a Monday tutorial, “Next Generation ISO 26262-based De... » read more

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