Power/Performance Bits: Dec. 11


Internet of Ears for smart buildings Scientists at Case Western Reserve University proposed a new way for smart homes to determine building occupancy: sensors that 'listen' to vibration, sound, and changes in the existing ambient electrical field. "We are trying to make a building that is able to 'listen' to the humans inside," said Ming-Chun Huang, an assistant professor in electrical engi... » read more

Power/Performance Bits: Dec. 4


Bio-hybrid fungi Researchers at Stevens Institute of Technology combined a white button mushroom, electricity-producing cyanobacteria, and graphene nanoribbons into a power-generating symbiotic system. "In this case, our system - this bionic mushroom - produces electricity," said Manu Mannoor, an assistant professor of mechanical engineering at Stevens. "By integrating cyanobacteria that ca... » read more

Power/Performance Bits: Nov. 27


Hybrid solar for hydrogen and electricity Researchers at the Lawrence Berkeley National Laboratory developed an artificial photosynthesis solar cell capable of both storing the sun's energy as hydrogen through water splitting and outputting electricity directly. The hybrid photoelectrochemical and voltaic (HPEV) cell gets around a limitation of other water splitting devices that shortchange... » read more

Power/Performance Bits: Nov. 20


In-memory compute accelerator Engineers at Princeton University built a programmable chip that features an in-memory computing accelerator. Targeted at deep learning inferencing, the chip aims to reduce the bottleneck between memory and compute in traditional architectures. The team's key to performing compute in memory was using capacitors rather than transistors. The capacitors were paire... » read more

Containing Design Complexity With POP IP


About 25 years ago, Carver Mead, one of the pioneers of VLSI design, told a technical audience then grappling with the complexities of quarter-micron design that he could see an evolutionary path to about 130nm, but after that point, the picture blurred. Flash forward to the present and we’re manufacturing SoCs at 7nm, and the output is truly amazing devices powering applications we and Me... » read more

How To Improve Analog Design Reuse


Digital circuit design is largely automated today, but most analog components still are designed manually. This may change soon. As analog design grows increasingly complex and error-prone, design teams and tool vendors are focusing on how to automate as much of the design of analog circuits as possible. Analog design is notoriously difficult and varied. It can include anything from power ma... » read more

Power/Performance Bits: Nov. 13


ML identifies LED material Researchers at the University of Houston created a machine learning algorithm that can predict a material's properties to help find better host material candidates for LED lighting. One recommendation was synthesized and tested. The technique, a support vector machine regression model, was efficient enough to run on a personal computer. It scanned a list of 118,28... » read more

Why Chips Die


Semiconductor devices contain hundreds of millions of transistors operating at extreme temperatures and in hostile environments, so it should come as no surprise that many of these devices fail to operate as expected or have a finite lifetime. Some devices never make it out of the lab and many others die in the fab. It is hoped that most devices released into products will survive until they be... » read more

Die-to-Die Interconnects for Chip Disaggregation


Today, data growth is at an unprecedented pace. We’re now looking at petabytes of data moving into zettabytes. What that translates to is the need for considerably more compute power and much more bandwidth to process all that data. In networking, high-speed SerDes PHYs represent the linchpin for blazing fast back and forth transmission of data in data centers. In turn, demand is increa... » read more

Die-To-Die Interconnects For Chip Disaggregation


Today, data growth is at an unprecedented pace. We’re now looking at petabytes of data moving into zettabytes. What that translates to is the need for considerably more compute power and much more bandwidth to process all that data. In networking, high-speed SerDes PHYs represent the linchpin for blazing fast back and forth transmission of data in data centers. In turn, demand is increasin... » read more

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