Week In Review: Manufacturing, Test


Intel Mark Bohr, a senior fellow and director of process architecture and integration at Intel, is retiring, according to the company. Bohr, who will retire at the end of February 2019, held various technology positions during his 41-year career at Intel. Here is a quick bio on Bohr. Others have also recently retired from Intel’s manufacturing unit amid a massive reorganization in the depart... » read more

Week in Review: IoT, Security, Auto


Internet of Things Arm made five 2019 predictions for the Internet of Things. They are: The intelligent home goes mainstream; personalized delivery options; improved health-care service; smart cities seek to improve revenue streams and citizen engagement; and smart buildings use more technology for efficiencies. The company also commissioned a worldwide survey of 2,000 consumers, conducted by ... » read more

Week In Review: Design, Low Power


The MIPI Alliance released MIPI I3C Basic v1.0, a subset of the MIPI I3C sensor interface specification that bundles 20 of the most commonly needed I3C features for developers and other standards organizations. The royalty-free specification includes backward compatibility with I2C, 12.5 MHz multi-drop bus that is over 12 times faster than I2C supports, in-band interrupts to allow slaves to not... » read more

Blog Review: Dec. 12


Mentor's Harry Foster checks out how much time and effort is spent on verification of FPGAs and points to the increasing demand for verification engineers. Cadence's Paul McLellan digs into IC Insights' year-end report to see how some of the top semiconductor companies stack up. Synopsys' Taylor Armerding warns that air gaps, a valuable barrier against cyberattacks, are disappearing from ... » read more

Week In Review: Manufacturing, Test


Fab tools/manufacturing Lam Research has accepted Martin Anstice’s resignation as chief executive and a member of the board. Lam has named Tim Archer as president and chief executive effective immediately. Archer, who served as Lam’s president and chief operating officer, has been named to the board. One analyst provided a comment on the situation at Lam. “In our view, Mr. Archer is very... » read more

Week In Review: Design, Low Power


RISC-V Western Digital announced big plans for RISC-V with a new open source RISC-V core, an open standard initiative for cache coherent memory over a network, and an open source RISC-V instruction set simulator. The SweRV Core features a 2-way superscalar design with a 32-bit, 9 stage pipeline core. It has clock speeds of up to 1.8Ghz on a 28mm CMOS process technology and will be used in vari... » read more

Week in Review: IoT, Security, Auto


Internet of Things DHL Supply Chain reports that it will spend $300 million to install Internet of Things sensors and collaborative robots in its North American warehouses, bringing 60% of those facilities up to automation capabilities already implemented in 85 of DHL’s 430 warehouses in North America. The company will also employ robotic process automation software and other programs to red... » read more

Blog Review: Dec. 5


Mentor's Harry Foster digs into verification effectiveness in FPGA projects and what it means that so many non-trivial bugs escape into production. Cadence's Paul McLellan checks out an effort to integrate photonics with CMOS and find the tradeoffs in three different approaches, plus the view of photonics as applied to military aircraft. Synopsys' Richard Solomon shares some highlights on... » read more

Week In Review: Manufacturing, Test


Chipmakers GlobalFoundries has announced that its advanced silicon-germanium (SiGe) offering is available for prototyping on 300mm wafers. GF’s SiGe technology has been shipping on its 200mm production line in Burlington, Vt. The technology, a 90nm SiGe process, is moving to 300mm wafers at GF’s Fab 10 facility in East Fishkill, N.Y. The SiGe technology is called 9HP. “The increasing ... » read more

Week In Review: Design, Low Power


Tools & IP UltraSoC debuted functional safety-focused Lockstep Monitor, a set of configurable IP blocks that are protocol aware and can be used to cross-check outputs, bus transactions, code execution, and register states between two or more redundant systems. It supports all common lockstep / redundancy architectures, including full dual-redundant lockstep, split/lock, master/checker, and... » read more

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