Important Changes Ahead

Two of Si2's important industry standards efforts will be featured later this month at DesignCon, a popular Silicon Valley event that is now in its 20th year. In the panel entitled, "System-Level Power Modeling—What's the Big Deal?", leading industry experts from AMD, Avago Technologies, Cadence, Docea Power, Qualcomm, and Si2 will focus on the growing need to take a higher level and more... » read more

See The Internet Of Things…In 3D

No, you don’t need 3D glasses to experience two of the hottest emerging technology trends in electronics — just take advantage of the longest running conference series on the topic of 3-D integrated circuits. Now in its 11th year, the 3D Architectures for Semiconductor Integration and Packaging conference will take place in San Francisco next week. The event will feature two pre-conference ... » read more

Multi-Die Packaging Gains Steam

By Herb Reiter Many readers will be familiar with my extensive background and focus in the emerging field of 3D IC technology, including both 3D stacked die and 2.5 interposer design flows. Now, I am excited to bring my expertise and passion to Silicon Integration Initiative (Si2), where I am now Director of 3D Programs, helping Si2’s members in the Open3D Technical Advisory Board develop pr... » read more

Why Multi-Die Integration Really Is On Its Way

Admit it. You’ve heard a lot about 3D IC’s for years now, and it’s starting to get old. Lots of talk but not much action, you say? Maybe it will never happen, you say? Well, perhaps it’s time to reassess the current situation, reevaluate emerging needs, and reset our “3D” paradigm for the coming multi-die imperative. The problems associated with 3D IC (stacked die) are real and v... » read more

ST Announces 20x Savings Using OpenPDK At DAC

Last month’s Design Automation Conference in San Francisco proved to be highly successful for Si2. This year, for example, Si2 organized 28 member-led presentations, issued 10 press releases, and hosted 5 special events. Today I will focus on one of those events, a special press conference featuring Philippe Magarshack, executive vice president for design enablement services at STMicroelectro... » read more

Reduced Power To The People!

Fifteen years ago, many of us involved in writing the design chapter of the ITRS (International Technology Roadmap for Semiconductors) already knew that power/energy consumption eventually would become a major problem for the industry’s growth. Engineers developing microprocessors (CPUs and DSPs) and graphics engines (GPUs) led the wave of predictions, because extrapolating known trend data s... » read more

Taming The PDK Beast At DAC

A quick Web search on the phrase “process design kit” reveals about 48 million matches. This happens to be about 10 times larger than for the current pop dance sensation “twerking,” so I guess that’s at least something to brag about. Yet if we now add the word interoperability to our PDK search, we find only 200K matches, or less than 0.5% — and therein exposes the chronic problem w... » read more

Inside SI2’s OpenPCell Workshop

In the last Standards and Beyond blog, we provided background on the Open Process Specification, including where pcells fit into the overall picture, and gave an invitation to the OpenPCell workshop being hosted by the Silicon Integration Initiative (Si2). The ensuing workshop, held on Jan. 29, was well attended with more than 35 companies represented across the globe. It was a gathering of man... » read more

A Perspective On Open Process Specification

It is the job of the Process Design Kit (PDK) engineers to deliver a high-quality PDK that properly represents the process requirements and constraints and supports the design flows used by their customers. The PDK engineer takes multiple inputs describing the process and the devices and circuitry in the process and generates the output in the form of OpenAccess technology libraries (techDB), d... » read more

Wanted: Standard Design Constraints

Lately, there has been increasing discussion in the industry about the need for a set of standards that specifically support an interoperable description of intent for analog and custom design, a.k.a. “analog design intent” standards. The driving need for such standardization is to enable far greater exchange of analog intent, with greater formalism and clarity, to greatly improve time-to-... » read more

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