Why Is TCAM Essential For The Cloud?


With port speeds exceeding 100Gbps, route lookups that are fundamental to all routers have relied on ternary content addressable memories (TCAMs) to provide a lookup response within a clock cycle. However, TCAMs in discrete form are expensive, consume a lot of power, compete for precious real estate on the printed circuit board (PCB), and often lack required flexibility. Embedding a TCAM block ... » read more

The Democratization Of CFD


“Democratization” is a buzzword that has been circulating around the Computational Fluid Dynamics (CFD) community for some time. In this White Paper, Keith Hanna and Ivo Weinhold of Mentor Graphicsdefine the issue, establish the facts, look at the pros and cons of various technology solutions being offered in the market today, and then suggest some pointers for the future as the CFD industr... » read more

IC Validator Programmable EERC Mixed Mode Checking Technology


Traditional visual inspection or manual checking for electrical rule compliance is both time consuming and error prone. A new, comprehensive reliability solution is needed to reduce time to market, improve reliability and ensure longer device operation. This paper is a companion to the introductory IC Validator programmable Extended Electrical Rule Check (EERC) white paper on netlist domain che... » read more

Automotive SoC Maker Saves Time, Enhances Product QoS For Advanced Real-Time Video Image Recognition


Automated driver assistance systems (ADAS) used to be expensive until Mobileye figured out how to use inexpensive cameras with advanced visual processing to help make cars autonomous. In this 4-page paper, created with the participation of Mobileye, you will learn how the world's #1 vision-based ADAS company uses Arteris FlexNoC interconnect IP to address demanding high bandwidth and low-latenc... » read more

Massive SoC Designs Open Doors To New Era In Simulation


As system-on-chip (SoC) designs have grown in size, simulation technologies have had to evolve dramatically to keep pace. We’re now at an inflection point where both speed and capacity are essential and new simulation technologies are needed to meet the demands. In this paper, we’ll discuss how simulation has evolved and examine how new technologies such as the Cadence RocketSim Parallel Si... » read more

Prototyping ARM Cortex-A Processors Using FPGA Platforms


With the increasing cost and complexity involved in new SoC (System-on-Chip) designs, FPGA (Field Programmable Gate Array) prototyping is becoming an increasingly important, or even crucial, part of new SoC projects. By offering a way to get to hardware sooner, FPGA prototyping allows hardware verification and software work to begin earlier, before first silicon, effectively pipelining the desi... » read more

Understanding How Small Variations In Photoresist Shape Significantly Impact Multi-Patterning Yield


Multi-patterning schemes such as Self-Aligned Double Patterning (SADP) and Self-Aligned Quadruple Patterning (SAQP) have been used to successfully increase semiconductor device density, circumventing prior physical limits in pattern density. However, the number of processing steps needed in these patterning schemes can make it difficult to directly translate a lithographic mask pattern to a fin... » read more

SerDes Signal Integrity Challenges At 28Gbps And Beyond


After nearly fifty years, NRZ technology continues to pose significant challenges as data rates approach 56Gbps and refreshed standards mandate increased receiver sensitivity (down to 35 mV). With shorter unit intervals and closing eyes, triggering becomes ever more complex and requires enhanced receiver equalization such as continuous-time-linear equalization and decision feedback equalization... » read more

Virtual PCIe Delivers A “Shift Left” In Software-Defined Networking Emulation


This paper reviews both SW and UVM Vector Based Verification (VBV) methodologies and Advanced Vector Based Verification (AVBV) that uses Software Defined Networking (SDN) HW to service PCIe transactions to the DUT. When deploying VBV methodologies, using the Veloce Transactor Library (VTL) family of components is most appropriate for UVM, C++ and SDK testbench methodologies. We explore how V... » read more

A Program Manager’s Guide to Successful Integrated Circuit Verification


Accurately monitoring progress on complex integrated circuit (IC) designs has become more difficult as the designs have increased in complexity, leading to surprises from backwards-looking reporting and management processes that do not forewarn coming crises. The Cadence Metric-Driven Verification Methodology provides a more uniform and standardized method of reporting progress towards closure ... » read more

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