Automated Body Bias Validation For High Performance, Low Power Electronics


Using a device’s body bias effect allows designers to tune a circuit’s behavior to meet both power and performance specifications, but getting it right isn’t always easy. Accurate, fast, automated body bias verification is critical to ensure today’s complex designs meet demanding performance, reliability, and power usage specifications. To read more, click here. » read more

Addressing Power Integrity Challenges For SoCs


Power integrity has become a crucial part of the system-on-a-chip (SoC) design flow because power-related issues can affect chip timing and even lead to complete device failure. Specifically, excessive rail voltage drop (IR-drop) and ground bounce can create timing problems and electromigration effects that impact a chip's performance and reliability. Analyzing a chip's power also poses diff... » read more

Intelligent Power Allocation


The modern System-on-Chip (SoC) has higher thermal dissipation than its previous generations, because of the following factors: Increasing processor frequencies. Decreasing SoC package and device sizes. Higher levels of integration. Static power consumption trends with the most advanced SoC fabrication. Faster frequencies mean faster switching, which means more power consumpt... » read more

Strategic Value Of High-Performance Computing For Research And Innovation


High-performance computing (HPC) is an enormous part of the present and future of engineering simulation. HPC enables engineers and researchers to gain high-fidelity insight into product behavior — insight that cannot be obtained without detailed simulation models. When applied to design exploration, HPC can lead to robust product performance and reduced warranty and maintenance costs. Wim Sl... » read more

Reliability Of eWLB For Automotive Radar Applications


With shrinking of chip sizes, Wafer Level Chip Scale Packaging (WLCSP) becomes an attractive and holistic packaging solutions with various advantages in comparison to conventional packages, such as Ball Grid Array (BGA) with flipchip or wirebonding. With the advancement of various fan-out (FO) WLPs, it has been proven to be a more optimal, low cost, integrated and reliable solution compared to ... » read more

True Costs Of Process Node Migration


Deciding when and how to make a process node transition is critical to business success. The solution that requires the least amount of total change—in the form of license configurations, required hardware resources, necessary tool qualifications, and adequate support infrastructure—will always be the most “inexpensive” option. Do you have all the information you need to make the right ... » read more

Thunderbolt 3 Remote Control Of PXI Test Systems


The new PXIe-8301 remote control module is the industry’s first solution for laptop control of PXI systems using Thunderbolt 3 technology. With its contemporary connectivity and low cost, the PXIe-8301 makes high-performance control of PXI systems more accessible and affordable to engineers performing benchtop characterization and validation or developing portable automated test systems. T... » read more

IoT Cyber-Security: A Missing Piece Of The Smart City Puzzle


Smart city devices, as well as the data they generate, must be protected against a wide range of cyber threats. Vulnerable devices can be hijacked and even physically disabled, while unencrypted or unverified data transmissions can be intercepted, leaked or spoofed. A leak or deliberate falsification of sensitive customer data will inevitably damage a brand and decrease confidence in smart city... » read more

Fusing CMOS IC And MEMS Design For IoT Edge Devices


Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved (Analog, digital, RF, and MEMS). But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a MEMS sensor on the same silicon die can seem impossible. In fact, many IoT edge devices combine multiple dies in a single package, separating electronics from the M... » read more

Evaluating Speedcore IP For Your ASIC


By exploiting Achronix Speedcore embedded FPGA (eFPGA) IP — IP proven in multiple ASIC designs for wireless, datacenter and high-performance computing (HPC) applications — designers of SoCs can now add logic programmability to their solution, resulting in a single ASIC that can adapt to many applications. While many system architects may already have strong ideas on how an eFPGA core could ... » read more

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