category: Videos

category: IoT, Security & Automotive

Cost And Quality Of Chiplets
By Ed Sperling - 19 Mar, 2024 - Comments: 0

Chiplets add a whole new challenge for the semiconductor industry. How much testing is enough? How do you optimize system binning? What’s the right amount of burn-in? The answers to these questions will vary, depending upon cost and quality tradeoffs, the number and source of the chiplets, and real-world workloads and projected lifespans. Marc Jacobs, senior director of solutions architectur... » read more

Yield Tracking In RDL
By Ed Sperling - 07 Feb, 2024 - Comments: 0

Yield is a much bigger issue when it comes to panel-level packages, which may contain up to 24 RDL layers. Just finding the defects is a massive challenge, let alone understanding how they will impact the entire device. Many of these advanced packages are being used in data centers for generative AI, and killer defects caused by bridges and opens can cause serious problems. What happens, for in... » read more

Reducing Power In Data Centers
By Ed Sperling - 16 Jan, 2024 - Comments: 0

The rollout of generative AI, coupled with more data in general, is requiring data centers to run servers harder and longer. That, in turn, is generating more heat and accelerating aging, and to ensure these systems continue working over their projected lifetimes, chipmakers are building extra margin into chips. That increases the amount of energy required to run and cool them, and it can short... » read more

Using Deep Data For Improved Reliability Testing
By Ed Sperling - 08 Jan, 2024 - Comments: 0

Reliability testing always has been a challenge for semiconductor companies, but it’s becoming much more difficult as devices continue to shrink, as they’re integrated together in advanced packages, and as they’re utilized under different conditions with life expectancy that varies by application and use case. Nir Sever, senior director of business development at proteanTecs, and Luca Mor... » read more

Total Overlay With Multiple RDLs
By Ed Sperling - 13 Nov, 2023 - Comments: 0

As Advanced IC Substrates (AICS) add more RDL layers, requiring additional via connections between the RDL layers, the potential for cumulative overlay shift increases. This overlay shift can lead to longer RDL traces, which increases interconnect resistance, resulting in lower yield. Keith Best, director of product marketing, for lithography at Onto Innovation, talks about total overlay — th... » read more

Manual X-ray Inspection
By Ed Sperling - 28 Aug, 2023 - Comments: 0

Increased density in advanced node chips and advanced packaging offers a way to greatly improve performance and reduce power, but it also makes it harder to inspect these devices for real and latent defects. Higher density can lead to scattering of light, and heterogeneous integration in a package means it’s not always possible to see through all materials equally. Chris Rand, product line ma... » read more

Striking A Balance In Acoustic Inspection
By Ed Sperling - 12 Jun, 2023 - Comments: 0

Sound energy is a quick way to to spot voids, delamination, cracks, and other possible defects that are accessible from outside the chip or package, as well as some defects that are inside of chips. But acoustic inspection also is highly sensitive to different materials with different polarities, which can change the reflection of sound waves. Bill Zuckerman, product marketing manager at Nordso... » read more

Zero Trust Security In Chip Manufacturing
By Ed Sperling - 08 Feb, 2023 - Comments: 0

More equipment vendors and more IP are making the data in a fab much more valuable than in the past, and a potential target for hackers. What’s needed is a different approach to architecting and deploying services and equipment, so breaches can be stopped before they affect other equipment and data, and a better way of sharing data. Brian Buras, production analytics solution architect at Adva... » read more

Efficient Trace In RISC-V
By Ed Sperling - 19 Dec, 2022 - Comments: 0

Systems with RISC-V cores often include multiple types of other processors and accelerators. Peter Shields, product manager for Tessent at Siemens Digital Industries Software, talks about what's needed for debug and trace in context, including the need for unobtrusive observation at full speed, what to trace and when to trace it, and how embedded IP can identify to report which branches are tak... » read more

Silent Data Corruption
By Ed Sperling - 12 Dec, 2022 - Comments: 0

Defects can creep into chip manufacturing from anywhere, but the problem is getting worse at advanced nodes and in advanced packages where reduced pin access can make testing much more difficult. Ira Leventhal, vice president of U.S. Applied Research and Technology at Advantest America, talks about what’s causing these so-called silent data errors, how to find them, and why it now requires ma... » read more

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