Coherency: The New Normal In SoCs

How automation can help even experienced SoC design teams deal with complex usage models.

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We are not far from devices each handling 100 teraflops of compute, billions of pixels of display, hundreds of gigabits of connectivity, and terabytes of storage. Compared with current state-of-the-art mobile SoCs, these are increases of one or two orders of magnitude — at similar or preferably lower power consumption.

SoC design is changing to meet this challenge. Multicore architecture is already the norm in mobile SoCs, a trend accelerating as more designs incorporate the approach. A determining factor in how well these cores work together is cache coherency. We now look at how cores, caching, and coherency have evolved, why existing design practices often run into trouble at scale, and how automation can help even the most experienced SoC design teams handle these new, rich, complex usage models.

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