High-bandwidth memory is standardized stacked memory technology that provides very wide channels for data, both within the stack and between the memory and logic.
An HBM stack can contain up to eight DRAM modules, which are connected by two channels per module. Current implementations include up to four chips, which is roughly the equivalent of 40 DDR cores in a fraction of the space.
What makes this technology attractive is bandwidth between the DRAM chips, between the module and logic (interposer technology), and the small form factor when compared to DRAM DIMMs.
JEDEC adopted the HBM standard in October 2013, and the HBM 2 standard in January 2016. Both Samsung and SK Hynix are now commercially producing HBM chips, with others expected to follow.