Bias temperature instability is a shift in threshold voltage with applied stress. When the shift exceeds some specified value, typically 30 mV, the device is considered to have failed. For pFETs, the threshold voltage corresponds to a negative gate bias, and so negative bias temperature instability (NBTI) is a more serious concern than positive BTI.
As devices shrink, the distribution of voltage shifts under stress has broadened. Large devices tend to have “average” behavior, and can be seen as identical. In smaller devices, however, the time to failure due to NBTI varies widely: some devices fail very quickly, others maintain their performance over the longest times that have been tested. Conversely, when the stress is removed, some devices recover very quickly, in fractions of a second, while others fail to recover over the longest intervals tested. While failure and recovery are both bias-dependent, the time constants of the two phenomena are not the same: some devices fail quickly and recover slowly or vice versa.
The rapid partial recovery of NBTI damage complicates both research into the phenomenon and efforts to compensate for it in circuit design. For a long time, research was hindered by the difficulty of applying stress and measuring the distribution of voltage shifts simultaneously. Different labs reported widely varying NBTI behavior depending on the (often unknown) time interval between stress and measurement. For designers, NBTI recovery means that reliability is a function of duty cycle as well as stress. In some tests, a shorter duty cycle — corresponding to a longer recovery interval between stresses — increases lifetime by ten or even a hundred times. This duty cycle dependence, combined with extreme variability in failure times, imposes a nearly impossible task on designers: trying to achieve reliable, consistent performance when the characteristics of individual devices vary unpredictably.