Physical vapor deposition has been the workhorse of the back-end-of-line for the copper damascene process. In this process, a structure undergoes a diffusion barrier etch step. Then, a via dielectric is deposited. An etch step then forms a gap, where the lines and vias are formed.
Then, a thin layer of barrier of tantalum (Ta) and tantalum nitride (TaN) materials are deposited using PVD. Ta is used to form the liner and TaN is for the barrier in a structure. The barrier layer is coated over by a copper (Cu) seed barrier via PVD. And finally, the structure is electroplated with copper and ground flat using chemical mechanical polishing (CMP).
For years, the industry has been talking about the demise of PVD, prompting the need for atomic layer deposition. PVD scaling below 30nm is challenging, but its use has continued all the way down to 16/14nm because of cost and proven reliability.