An old saying goes something like: if you fail to plan, you plan to fail. That is very much the case with functional verification. A verification plan defines what needs to be verified in a hardware design and then drives the verification strategy. As an example, the verification plan may define the features that a system has and these may get translated into the coverage metrics that are set. Those coverage goals must then be met before the design can proceed to the next phase in the flow.
It should be noted that the verification plan does not contain the actual tests, but it may state the approach that is to be taken. Some goals may be easier to reach using formal techniques, some may be better suited to simulation and still others may need to be executed on an emulator or virtual prototype if the expected runtimes exceed those possible using simulation.
In many cases, the verification plan will also be the place where coverage data is collected and monitored.
The verification plan can exist in many forms, such as a spreadsheet, a series of documents, or contained within a special purpose tool designed to help write, refine and maintain the plan.
During development of the verification plan, other information may be added such as the development strategy for the testbench components, the priorities of certain features, schedules and verification IP components that are to be used.
Verification Plans: The Five-Day Verification Strategy for Modern Hardware Verification Languages