Knowledge Center

Knowledge Center ➜ Technology

AVM

Verifciation methodology created by Mentor
popularity

Description:

The Advanced Verification Methodology (Avm) was a verification methodology and base class library written in SystemVerilog and created by Mentor Graphics in 2006. It provided a framework for component hierarchy and TLM communication to provide a standardized use model for SystemVerilog verification environments.

AVM was open-source and provided both SystemVerilog and SystemC methodologies. This SystemC version was based on the OSCI TLM standard.


  • Other names: Advanced Verification Methodology
  • Type: EDA

Relationships:

Suggestions?

We want to hear from you. If you have any comments or suggestions about this page, please send us your feedback.