Why the HLS division was spun out, and why it is now being reclaimed.
Back in 2002, a small startup company decided to tackle one of the most difficult problems in EDA—one that, if solved, could have opened up a whole new level of abstraction. Back when logic synthesis was the new tool to try out, it suffered from the fact that gate-level simulation had to be performed on the output, even if the input had been verified at the higher level of abstraction.
And yet it was gate level simulation’s slow performance that was one of the biggest drivers for the need for a new abstraction. Formal Verification was the savior in that it managed to prove functional equivalence between the input and output of logic synthesis, and while small amounts of gate level simulation were still performed, the vast majority no longer needed to be performed.
Jump forward 15 years and RTL simulation is running out of steam. The industry is pushing for a new abstraction, and many startups have been created to tackle the problem. High-level synthesis is the hottest topic around, and every EDA company believes that if they can control synthesis, they will become the new Synopsys. But only one company attempts to tackle equivalence checking for this new abstraction – Calypto. The first year the company exhibited at DAC they created a rare problem. So many people crowded around their booth that the aisles were blocked.
But the problem Calypto was attempting to solve was a tough one, and could only be used under certain circumstances. Rather than accept defeat, Calypto moved their focus to checking small changes in a design, much like had been done for the insertion of test logic at the RT level. The changes they were targeting were small changes that targeted power optimization.
In 2011, Mentor Graphics and Calypto made a very interesting business arrangement where Mentor sold Calypto their high-level synthesis solution – Catapult – in exchange for 51% of the company, but left it as a fully standalone entity. The initial thinking was that with full access to the high-level synthesis process, perhaps sequential equivalence checking could be made to work. While it appears as if that is still a ways off, Catapult allowed architectural exploration to be performed and the power impacts of those changes evaluated. Calypto now had an even stronger power optimization tool suite.
Power-aware design has risen to become a first-class optimization criterion in just about every product from the very leading edge devices, to devices for the Internet of Things, to devices used in server farms. Mentor decided this has become a solid business and has acquired the remainder of the company. It will now bring Calypto back in house as a separately operating division of Mentor.
While EDA companies have attempted to act as venture capitalists in the past, and some still do provide funding to interesting new companies, the model has not produced many notable successes. Mentor also pioneered bringing in, or starting new ventures within the company, and operating them as if they were startups. This allowed the people to share in the success of the product, while at the same time giving them the stability of a mature company. Mentor was bold in allowing one of the hopeful new technologies to go outside of the company and become part of a true startup and the combination has proven to be very successful.
Sanjiv Kaul, the current president and CEO of Calypto who came on board in 2013, will be replaced by Badru Agarwala , the former CEO and founder of Axiom Design Automation (formerly @HDL) and former president of Frontline Design Automation, Inc..