Molybdenum disulfide memristors; neural network chip for mobile; nanoscale materials for the IoT.
Molybdenum disulfide memristors
Researchers at Michigan Technological University constructed an ideal memristor based on molybdenum disulfide nanosheets.
“Different from an electrical resistor that has a fixed resistance, a memristor possesses a voltage-dependent resistance,” said Yun Hang Hu, professor of materials science and engineering at MTU, adding that a material’s electric properties are key. “A memristor material must have a resistance that can reversibly change with voltage.”
Molybdenum disulfide’s potential as a memristor material comes down to engineering atomic structures. An ideal memristor is symmetrical. The relationship between current and voltage is even, rounded and equal in both quadrants. In reality, memristors usually show lopsided current-voltage characteristics. However, the team’s molybdenum disulfide memristor does show the ideal symmetry, making the material more predictable and consistent as it is developed for use in electronics.
To get this symmetry, the team started with bulk molybdenum disulfide. They then manipulated the atomic, structural arrangements, referred to as different crystal phases. The bulk material with a 2H phase works well as a regular resistor, and to make it a memristor, the team peeled back the molecular layers. This exfoliation process creates molybdenum disulfide nanosheets with 1T phase. The nanosheets with1T phase exhibit a reversible change in resistance relative to voltage—necessary for a memristor. The researchers finally dispersed nanosheets on the two sides of a silver foil to form a symmetric memristor.
“This material is in the very beginning stages for this application,” Hu says, adding that new materials and better memristors could radically change the way computers are built.
Neural network chip for mobile
At the recent International Solid State Circuits Conference, MIT researchers presented a new chip designed specifically to implement neural networks. The team says it is 10 times as efficient as a mobile GPU and could enable mobile devices to run powerful artificial-intelligence algorithms locally, rather than uploading data to the Internet for processing.
The chip, dubbed “Eyeriss,” has 168 cores, each with its own memory bank, as well as a circuit that compresses data before sending it to individual cores.
Each core is also able to communicate directly with its immediate neighbors, so that if they need to share data, they don’t have to route it through main memory. This is essential in a convolutional neural network, in which so many nodes are processing the same data.
The final key to the chip’s efficiency is special-purpose circuitry that allocates tasks across cores. In its local memory, a core needs to store not only the data manipulated by the nodes it’s simulating but data describing the nodes themselves. The allocation circuit can be reconfigured for different types of networks, automatically distributing both types of data across cores in a way that maximizes the amount of work that each of them can do before fetching more data from main memory.
At the conference, the researchers used Eyeriss to implement a neural network that performs an image-recognition task, which they say is the first time a state-of-the-art neural network has been demonstrated on a custom chip.
Nanoscale materials for the IoT
The concept of the IoT relies on communications and most of that is expected to be wireless in nature. But that requires sufficient frequency spectrum to connect the assorted devices. Many in industry believe that significant policy changes will be required to enable the needed connections while avoiding interference.
Researchers at the Harvard John A. Paulson School of Engineering and Applied Sciences and Draper are developing a new approach to assembling nanoscale hardware that could overcome this challenge by enabling devices to generate and receive purer signals to reduce interference with other nearby transmissions. This could free up spectrum by reducing the need for space between frequencies.
Funded by DARPA and the U.S. Air Force Research Laboratory, the NanoLitz project is part of the Atoms to Product (A2P) effort to find new ways to assemble nanoscale materials that cannot be accomplished with current techniques such as those used in the semiconductor and MEMS industries or through chemical synthesis.
The NanoLitz approach braids microscopic wires to reduce heat loss, improve efficiency, and sharpen filter response. To operate at frequencies used in devices like smartphones, the team is developing techniques for making wires up to 1,000 times smaller than those used today. The wires will be braided with techniques borrowed from MEMS and microfluidics. The team is also developing a DNA self-assembly method as a tool for manufacturing braids.
The improved signal performance could also enable devices to transmit up to five times more data per channel, receive much fainter signal levels, and overcome interference that disrupts GPS signals, said Draper’s David Carter, NanoLitz program manager.