Staying Neutral

By Kurt Shuler
It’s official: The great IP land grab has begun.

The process actually has been taking place gradually, but has accelerated with Imagination Technologies’ acquisition of MIPS last year and, most recently, Cadence’s acquisition of Tensilica. For makers of semiconductors, four competing IP behemoths are emerging after years of fragmentation within the semiconductor IP industry.

The four big IP players are now ARM, Synopsys, Imagination and Cadence.

This is certainly not a bad thing for the remaining non-public IP companies. The $350M offer by Cadence for Tensilica probably works out to about a 7x to 8x multiplier over annual revenues, which is a very healthy premium. Unlike some previous acquisitions where a company was purchased for a small premium, such as Virage Logic’s 2009 acquisition of ARC International, the magnitude of the Cadence/Tensilica deal demonstrates the economic value and importance of design IP in the semiconductor value chain.

On the flip side, semiconductor makers may feel a little nervous when they look at the industry concentration of semiconductor design IP vendors. The most recent data from Gartner’s annual report, “Market Share: Semiconductor Design Intellectual Property, Worldwide, 2012,” shows that the new acquisitions have resulted in four companies providing nearly 65% of all semiconductor IP licensed in 2012. This concentration is expected to increase as Cadence and others continue to pursue IP acquisition strategies.

The good thing is that semiconductor makers need not feel “locked-in” to any one vendor or ecosystem. There are already technologies and companies whose primary purpose is to link together various IP islands, no matter what is the transaction protocol or who is the IP vendor. These companies enable semiconductor vendors to choose “the best IP for the job,” helping SoC design teams assemble and verify their chips at an increasingly fast pace.

I’m lucky enough to work for one of these companies. I used to define our benefits as our technology “speeds and feeds,” or the way its use helps our customers get to market sooner. But from speaking with customers it is clear that one of the primary benefits is more simple and basic: We help make it possible for design teams to ensure that, no matter where they purchase their IP, they can easily integrate it. And IP vendors benefit from this same phenomenon. We help reduce the friction and pain of SoC assembly, helping both semiconductor designers and IP vendors get their products to market sooner.

It’s good to be living in IP Switzerland.

—Kurt Shuler is vice president of marketing at Arteris.