Battling Fab Cycle Times


The shift from planar devices to finFETs enables chipmakers to scale their processes and devices from 16nm/14nm and beyond, but the industry faces several challenges at each node. Cost and technical issues are the obvious challenges. In addition, cycle time—a key but less publicized part of the chip-scaling equation—also is increasing at every turn, creating more angst for chipmakers and... » read more

Fix Processes, Then Silos


Jack Welch, former CEO of GE, was a big proponent of what he called a "boundaryless corporation." It was a good sound bite, but it pales in comparison to former Intel CEO Andy Grove's philosophy of working out of a cubicle, just like the rest of his staff. While it's great to have corporate buy-in for breaking down silos, which are vertically integrated, the real problem for semiconductor c... » read more

Will EUV Kill Multi-Patterning?


When I first began working on double-patterning (DP) tools back in late 2010, there was already talk that it might be a fruitless, or at a minimum, very short-lived project, as extreme ultraviolet (EUV) lithography was just around the corner and would make all multi-patterning (MP) obsolete. Well, as I begin my seventh year on this project, I can hear echoes of Mark Twain as clearly, the report... » read more

Transferring Skills Getting Harder


Rising complexity in developing chips at advanced nodes, and an almost perpetual barrage of new engineering challenges at each new node, are making it more difficult for everyone involved to maintain consistent skill levels across a growing number of interrelated technologies. The result is that engineers are being forced to specialize, but when they work with other engineers with different ... » read more

TSMC: 10nm To Be Greater Than 10% Of 2017 Wafer Revenue


TSMC’s financial results for the 4th Quarter of 2016 were released on January 11, 2017 (PST) and showed that year-over-year fourth quarter revenue increased 28.8% and simultaneously net income and diluted EPS both increased 37.6%.  In U.S. dollars, TSMC’s fourth quarter revenue was $8.25 billion. TSMC's CFO, Ms. Lora Ho, reported that 2016 was a good year for TSMC and that the company set ... » read more

Mobile Processors Move Beyond Phones


Mobile processors, also known as application processors, are well-known as the engines that run smartphones, tablet computers, and other wireless devices. But these chips increasingly are finding their way into autonomous vehicles, the Internet of Things, unmanned aerial vehicles, virtual reality, and other applications far beyond phone calls and text messages. Moreover, they are gaining in com... » read more

BEOL Issues At 10nm And 7nm


Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

Foundries See Mixed Future


Amid a tumultuous business environment, the silicon foundry industry is projected to see steady growth in a number of process segments in 2017. As in past years, the foundry market is expected to grow faster than the overall IC industry in 2017. But at the same time, the IC industry—the foundry customer base—continues to witness a frenetic wave of merger and acquisition activity. Basical... » read more

Uncertainty Grows For 5nm, 3nm


As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

Morphing Moore’s Law


In 1965, Gordon Moore defined a timetable for doubling the number of transistors on a piece of silicon every two years. The law, as he originally defined it, is now hopelessly outdated. Any attempts to apply it to the most advanced chips today are a stretch at best, and complete fiction at worst. No one is on a two-year cadence between process nodes anymore—not even Intel. In fact, no one ... » read more

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