Interconnect Challenges Grow


It’s becoming apparent that traditional chip scaling is slowing down. The 16nm/14nm logic node took longer than expected to unfold. And the 10nm node and beyond could suffer the same fate. So what’s the main cause? It’s hard to pinpoint the problem, although many blame the issues on lithography. But what could eventually hold up the scaling train, and undo Moore’s Law, is arguably t... » read more

Getting Ready For High-Mobility FinFETs


By Mark LaPedus The IC industry entered the finFET era in 2011, when Intel leapfrogged the competition and rolled out the newfangled transistor technology at the 22nm node. Intel hopes to ramp up its second-generation finFET devices at 14nm by year’s end, with plans to debut its 11nm technology by 2015. Hoping to close the gap with Intel, silicon foundries are accelerating their efforts t... » read more

A Delicate Balancing Act


ver since the patent for complementary metal oxide semiconductors was awarded to Frank Wanlass at Fairchild in 1967, CMOS has proved to be one of the most durable technologies in electronics history. It has powered devices worth trillions of dollars in sales, been the recipient of an estimated $600 billion in R&D, and become the basis of some of the most refined manufacturing processes in h... » read more