Multi-Patterning Issues At 7nm, 5nm


Continuing to rely on 193nm immersion lithography with multiple patterning is becoming much more difficult at 7nm and 5nm. With the help of various resolution enhancement techniques, optical lithography using a deep ultraviolet excimer laser has been the workhorse patterning technology in the fab since the early 1980s. It is so closely tied with the continuation of [getkc id="74" comment="Mo... » read more

Partitioning For Power


Examine any smartphone design today and most of the electronic circuitry is "off" most of the time. And regardless of how many processor cores are available, it's rare to use more than a couple of those cores at any point in time. The emphasis is shifting, though, as the mobility market flattens and other markets such as driver-assisted vehicles and IoT begin gaining traction. In a car, turn... » read more

To 10nm And Beyond


Hong Hao, senior vice president of the foundry business at Samsung Semiconductor, sat down with Semiconductor Engineering to discuss the future direction of transistors, process technology, lithography and other topics. What follows are excerpts of those conversations. SE: Samsung recently rolled out its 10nm finFET technology. It appears that Samsung is the world’s first company to ship 1... » read more

7nm Market Heats Up


The 7nm finFET market is heating up in the foundry business amid the ongoing push to develop chips at advanced nodes. Not long ago, TSMC announced plans to enter the 7nm finFET market. In addition, Intel and Samsung are also separately planning to enter the 7nm finFET race. Now, GlobalFoundries is formally announcing its 7nm finFET technology. Slated for 2018, GlobalFoundries’ 7nm fin... » read more

What Transistors Will Look Like At 5nm


Chipmakers are currently ramping up 16nm/14nm finFET processes, with 10nm and 7nm just around the corner. The industry also is working on 5nm. TSMC hopes to deliver a 5nm process by 2020. GlobalFoundries, Intel and Samsung are doing R&D for that node. But 5nm technology presents a multitude of unknowns and challenges. For one thing, the exact timing and specs of 5nm remain cloudy. The... » read more

What’s Important For IoT—Power, Performance Or Integration?


Semiconductor Engineering sat down with Steve Hardin, director of product development for AT&T's IoT Solutions Group; Wayne Dai, CEO of VeriSilicon; John Koeter, vice president of the Solutions Group at [getentity id="22035" e_name="Synopsys"]; and Rajeev Rajan, vice president for IoT at [getentity id="22819" comment="GlobalFoundries"]. What follows are excerpts of that conversation. SE:... » read more

Executive Insight: Jack Harding


[getperson id="11145" comment="Jack Harding"], president and CEO of [getentity id="22242" e_name="eSilicon"], sat down with Semiconductor Engineering to talk about consolidation, business relationships, what it will take to survive in the IoT age, and how to better optimize chips. What follows are excerpts of that conversation. SE: We’ve been looking at consolidation for a while and all th... » read more

No More Easy IP Money


The semiconductor intellectual property ([getkc id="43" kc_name="IP"]) industry is two decades old, but questions are still being asked about what's wrong with it and what needs to be fixed. Normally these kinds of issues are reserved for fast-moving, young industries, not one that is the backbone of semiconductors. Design reuse has become an indispensable part of the design of nearly all el... » read more

Abundant Change Ahead


There is nobody who would question the amazing ride that semiconductors have been on for the past 50 years. It has been described as the longest running exponential that humankind has ever been a part of—and it is not over yet. Still, the future is very likely to be substantially different from the past. It is almost natural for us to see a trend and assume it will continue. There have bee... » read more

Interconnect Challenges Rising


Chipmakers are ramping up their 14nm finFET processes, with 10nm and 7nm slated to ship possibly later this year or next. At 10nm and beyond, IC vendors are determined to scale the two main parts of the [getkc id="185" kc_name="finFET"] structure—the transistor and interconnects. Generally, transistor scaling will remain challenging at advanced nodes. And on top of that, the interconnects ... » read more

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