Challenges For Future Fan-Outs


The fan-out wafer-level packaging market is heating up. At the high end, for example, several packaging houses are developing new fan-out packages that could reach a new milestone and hit or break the magic 1µm line/space barrier. But the technology presents some challenges, as it may require more expensive process flows and equipment like lithography. Today, the industry is developing vari... » read more

Deep Learning Robust Grasps with Synthetic Point Clouds & Analytic Grasp Metrics (UC Berkeley)


Source: The research was the work of Jeffrey Mahler, Jacky Liang, Sherdil Niyaz, Michael Laskey, Richard Doan, Xinyu Liu, Juan Aparicio Ojea, and Ken Goldberg with support from the AUTOLAB team at UC Berkeley. Nimble-fingered robots enabled by deep learning Grabbing awkwardly shaped items that humans regularly pick up daily is not so easy for robots, as they don’t know where to apply grip... » read more

Ultra-Thin Substrate Assembly Challenges For Advanced Flip Chip Package


Advanced semiconductor packaging requirements for higher and faster performance in a thinner and smaller form factor continues to grow for mobile, network and consumer devices. While the increase in device input/output (I/O) count is driven by the famous “Moore’s Law”, the packaging industry is experiencing opposing trends for more complex packaging solutions while the expected cost targe... » read more

Design For Silicon Success At 7nm


Next-generation automotive, mobile and high-performance computing applications demand the use of 7nm SoCs to deliver greater functionality and higher performance at much lower power. According to Gartner, when compared to 16nm/14nm technology, 7nm offers 35% speed improvement, 65% less power, and 3.3X density improvement. Hence, despite a whopping cost of $271M — per Gartner's estimate — to... » read more

System-Level Testing


This white paper on system-level testing for semiconductors. Covering the history and trends of system-level test for semiconductors, this solution brief discusses: The increasing complexities of testing advanced semiconductor integrated devices across a span of applications: automotive, mobile computing, wearables, and more; Semiconductor trends driving necessary shifts in testing method... » read more

2.5D, FO-WLP Issues Come Into Focus


Advanced packaging is beginning to take off after years of hype, spurred by 2.5D implementations in high-performance markets and fan-out wafer-level packaging for a wide array of applications. There are now more players viewing packaging as another frontier driving innovation. But perhaps a more telling sign is that large foundries in Taiwan have begun offering packaging services to customer... » read more

Electroplating IC Packages


The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

What’s Next For Transistors


The IC industry is moving in several different directions at once. The largest chipmakers continue to march down process nodes with chip scaling, while others are moving towards various advanced packaging schemes. On top of that, post-CMOS devices, neuromorphic chips and quantum computing are all in the works. Semiconductor Engineering sat down to discuss these technologies with Marie Semeri... » read more

Overcoming The Limits Of Scaling


Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

What’s Missing In Advanced Packaging


Even though Moore's Law is running out of steam, there is still a need to increase functional density. Increasingly, this is being done with heterogeneous integration at the package or module level. This is proving harder than it looks. At this point there are no standardized methodologies, and tools often are retrofitted versions of existing tools that don't take into account the challenges... » read more

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