What Is Spin Torque MRAM?


The memory market is going in several different directions at once. On one front, the traditional memory types, such as DRAM and flash, remain the workhorse technologies. Then, several vendors are readying the next-generation memory types. As part of an ongoing series, Semiconductor Engineering will explore where the new and traditional memory technologies are heading. For this segment, P... » read more

What’s After FinFETs?


Chipmakers are readying their next-generation technologies based on 10nm and/or 7nm finFETs, but it's still not clear how long the finFET will last, how long the 10nm and 7nm nodes for high-end devices will be extended, and what comes next. The industry faces a multitude of uncertainties and challenges at 5nm, 3nm and beyond. Even today, traditional chip scaling continues to slow as process ... » read more

Can A Supply Chain Be Too Efficient?


The semiconductor industry is a model of efficiency—literally. When other industries look at adding smart manufacturing into their operations, they often look to chip manufacturing as a shining example. After decades of business gyrations, semiconductor companies have figured out how to instill efficiency into every aspect of making chips. This is evident in device scaling. At 90nm, the co... » read more

Is 7nm The Last Major Node?


A growing number of design and manufacturing issues are prompting questions about what scaling will really look like beyond 10/7nm, how many companies will be involved, and which markets they will address. At the very least, node migrations will go horizontally before proceeding numerically. There are expected to be more significant improvements at 7nm than at any previous node, so rather th... » read more

Tech Talk: 7nm Litho


David Fried, chief technology officer at Coventor, digs into future scaling issues involving multi-patterning and new transistor types. https://youtu.be/FBnYRAL1xKY Related Stories Inside Next-Gen Transistors Coventor’s CTO looks at new types of transistors, the expanding number of challenges at future process nodes & the state of semiconductor development in China. Faster Time To ... » read more

Architecture First, Node Second


What a difference a node makes. A couple of rather important changes have occurred in the move from 16/14 to 10/7nm (aside from more confusing naming conventions). First, companies that require more transistors—processor companies such as [getentity id="22846" e_name="Intel"], AMD, [getentity id="22306" comment="IBM"] and [getentity id="22676" e_name="Qualcomm"]—have come to grips with t... » read more

New BEOL/MOL Breakthroughs?


Chipmakers are moving ahead with transistor scaling at advanced nodes, but it's becoming more difficult. The industry is struggling to maintain the same timeline for contacts and interconnects, which represent a larger portion of the cost and unwanted resistance in chips at the most advanced nodes. A leading-edge chip consists of three parts—the transistor, contacts and interconnects. The ... » read more

Inside FD-SOI And Scaling


Gary Patton, chief technology officer at [getentity id="22819" comment="GlobalFoundries"], sat down with Semiconductor Engineering to discuss FD-SOI, IC scaling, process technology and other topics. What follows are excerpts of that conversation. SE: In logic, GlobalFoundries is shipping 14nm finFETs with 7nm in the works. The company is also readying 22nm FD-SOI technology with 12nm FD-SOI ... » read more

2.5D, ASICs Extend to 7nm


The leading-edge foundry market is heating up. For example, GlobalFoundries, Intel, Samsung and TSMC have recently announced their new and respective processes. The new processes from vendors range anywhere from 10nm to 4nm, although the current battle is taking place at 10nm and/or 7nm. In fact, one vendor, GlobalFoundries, this week will describe more details about its previously-announced... » read more

System Bits: June 6


Silicon nanosheet-based builds 5nm transistor To enable the manufacturing of 5nm chips, IBM, GLOBALFOUNDRIES, Samsung, and equipment suppliers have developed what they say is an industry-first process to build 5nm silicon nanosheet transistors. This development comes less than two years since developing a 7nm test node chip with 20 billion transistors. Now, they’ve paved the way for 30 billi... » read more

← Older posts