The Week In Review: Design


M&A Mentor acquired Valydate, provider of the VERA schematic integrity analysis tool. Founded in 2010, the Canadian company also offered signal and power integrity and static timing analysis services. Valydate's technology will be integrated with Mentor's Xpedition PCB design flow, though former Valydate CEO Michael Alam says it will continue to serve all EDA environments. Tools Aldec ... » read more

Blog Review: Aug. 9


Cadence's Paul McLellan digs into a recently discovered vulnerability in the Broadcom Wi-Fi chip used in many smartphones and why it should be a wakeup call for SoC designers. Mentor's Craig Armenti considers whether work-in-process design data management is an asset or a liability. Synopsys' Thomas M. Tuerke notes that in code, as in medicine, proper hygiene is should be treated as a con... » read more

Improving VHDL


For the past several years, I have had the privilege to chair the IEEE 1076 VHDL working group. In March, we handed off the revisions to the VHDL LRM to our technical editor to finalize the document for balloting. As we are waiting for the standards process to finish up, I thought I would share my favorite new additions. Let me start with an executive summary: VHDL-2017 plus Open Source VHDL... » read more

How Much Verification Is Necessary?


Since the advent of IC design flows, starting with RTL descriptions in languages like Verilog or VHDL, project teams have struggled with how much verification can and should be performed by the original RTL developers. Constrained-random methods based on high-level languages such as [gettech id="31021" t_name="e"] or [gettech id="31023" comment="SystemVerilog"] further cemented the role of t... » read more

Blog Review: July 19


Synopsys' Prishkrit Abrol provides a detailed explanation of how the USB Type-C connector works. Mentor's Ricardo Anguiano examines how the RISC-V ecosystem is expanding and latest developments in the open source toolchain. Cadence's Gopi Krishnamurthy explains the lane margining requirements of the PCIe 4.0 specification. ARM's Chet Babla unravels some claims about Narrowband IoT, Cat... » read more

Cutting CapEx, Not Capacity


‘The cloud’ has been an industry buzz word for some time now, and while the initial focus was on data storage and sharing - and spawned the likes of Dropbox – ‘cloud computing’ is currently the latest trend. For instance, Amazon’s cloud platform, Amazon Web Services (AWS), gives users access to servers and a range of applications. Storage is available as before but so too now are... » read more

Verification In The Cloud


By Ed Sperling Leasing of cloud-based verification resources on an as-needed basis is finally beginning to gain traction after more than a decade of false starts and over-optimistic expectations. All of the major EDA vendors now offer cloud-based services. They view this as a way of either supplementing a chipmaker's existing resources at various peak use times, or for small and midsize com... » read more

Blog Review: June 21


Mentor's John McMillan looks into the unique form-factors and components influencing IoT PCB designs. Cadence's Paul McLellan notes some big topics at the Samsung Foundry Forum: FD-SOI, embedded MRAM, and which gate-all-around FET architecture may be the winner. Synopsys' Eric Huang has a lighthearted look at why to buy IP versus building it. Rambus' Aharon Etengoff points to another U... » read more

Blog Review: June 7


Cadence's Paul McLellan listens in on Jeff Bier's Embedded Vision Summit keynote, where he argues the cost and power consumption of vision computing will decrease by about 1000X in the next three years. Synopsys' Sean Safarpour points to three reasons formal has grown in the last ten years to become a standard part of the verification toolbox. Mentor's Matthew Balance checks out the abili... » read more

Toward Continuous HW-SW Integration


Hardware is only as good as the software that runs on it, and as system complexity grows that software is lagging behind. The way to close that gap is to improve the [getkc id="100" kc_name="methodology"] for developing that software in the first place. That includes making sure updates are verified and tested before being pushed out to devices, adding the same kinds of detailed checks that ... » read more

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