Designing Hardware For Security


By Ed Sperling and Kevin Fogarty Cyber criminals are beginning to target weaknesses in hardware to take control of devices, rather than using the hardware as a stepping stone to access to the software. This shift underscores a significant increase in the sophistication of the attackers, as evidenced by the discovery of Spectre and Meltdown by Google Project Zero in 2017 (made public in Ja... » read more

Power/Performance Bits: May 8


Cobalt-free cathodes Researchers at the University of California, Berkeley, built lithium-ion battery cathodes without cobalt that can store 50% more energy than traditional cobalt-containing cathodes. Currently, lithium-ion battery cathodes use layered structures, which cobalt is necessary to maintain. When lithium ions move from the cathode to anode during charging, a lot of space is left... » read more

Hidden Costs Of Shifting Left


The term "Shift Left" has been used increasingly within the semiconductor development flow to indicate tasks that were once performed sequentially must now be done concurrently. This is usually due to a tightening of dependences between tasks. One such example being talked about today is the need to perform hardware/software integration much earlier in the flow, rather than leaving it as a sequ... » read more

Non-Traditional Chips Gaining Steam


Flexible hybrid electronics are beginning to roll out in the form of medical devices, wearable electronics and even near-field communications tags in retail, setting the stage for a whole new wave of circuit design, manufacturing and packaging that reaches well beyond traditional chips. FHE devices begin with substrates made of ceramics, glass, plastic, polyimide, polymers, polysilicon, stai... » read more

More Lithography/Mask Challenges


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

The Week In Review: Design


Tools & IP Pro Design launched three new proFPGA Zynq UltraScale+ FPGA modules for SoC and IP prototyping. The modules combine FPGA logic with quad-core ARM Cortex-A53 and dual-core ARM Cortex-R5 processors and on-board interfaces. The modules offer a total of up to 5 extension sites with 531 standard I/Os and 16 multi-gigabit transceivers (MGTs). The board allows a maximum point-to-point ... » read more

eSilicon Builds ASIC Business On Leading-Edge Chip Design


How advanced application specific integrated circuits (ASIC) chip design and manufacturing for leading-edge applications such as networking and artificial intelligence can be successfully outsourced. The company which has capabilities in 2.5D packaging, high-bandwidth memories (HBM), and silicon IP for fast memories and SerDes designs. The company has many leading system companies as custome... » read more

Cheaper Packaging Options Ahead


Lower-cost packaging options and interconnects are either under development or just being commercialized, all of which could have a significant impact on the economics of advanced packaging. By far, the most cited reason why companies don't adopt advanced [getkc id="27" kc_name="packaging"] is cost. Currently, silicon [getkc id="204" kc_name="interposers"] add about $30 to the price of a med... » read more

The Week In Review: Design


Security Addressing the Meltdown and Spectre speculative execution vulnerabilities has not gone smoothly. Intel's firmware update caused unexpected behavior and a higher than expected number of reboots for its Haswell and Broadwell chips, leading the company to recommend users stop patching until an updated version of the patch is available. Microsoft's attempts to fix the issue left some W... » read more

Pattern-Based Analytics To Estimate And Track Yield Risk Of Designs Down To 7nm


Topological pattern-based methods for analyzing IC physical design complexity and scoring resulting patterns to identify risky patterns have emerged as powerful tools for identifying important trends and comparing different designs. In this paper, previous work is extended to include analysis of layouts designed for the 7nm technology generation. A comparison of pattern complexity trends with r... » read more

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