Fan-Outs vs. TSVs


Two years ago, at the annual IMAPS conference on 2.5D and 3D chip packaging, the presentations were dominated by talk of fan-out wafer-level packaging. There was almost no talk of through-silicon vias, which previously had been heralded as vital to 2.5D and 3DIC packaging. Fast forward to this month's 3D Architectures for Heterogeneous Integration and Packaging conference in Burlingame, Cali... » read more

Shortages Hit Packaging Biz


Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up earlier this year, but the problem has been growing and spreading since then. Supply imbalances reached a boiling point in the third and fourth quarters of this yea... » read more

ASE-SPIL Merger Wins Clearance


Advanced Semiconductor Engineering (ASE) and Siliconware Precision Industries (SPIL) have finally received all anti-trust approvals for the proposed and long-awaited merger between the two IC packaging houses. The anti-trust approvals are a big step that clears the way for the creation of a combined ASE-SPIL entity. The ASE-SPIL entity, in turn, will create a powerhouse in the outsourced ... » read more

Cheaper Fan-Outs Ahead


Packaging houses continue to ramp up fan-out wafer-level packages in the market, but customers want lower cost fan-out products for a broader range of applications, such as consumer, RF and smartphones. So in R&D, the industry for some time has been developing next-generation fan-out using a panel-level format, a technology that could potentially lower the cost of fan-out. But there are ... » read more

Advanced Packaging Picks Up Steam


The semiconductor industry’s push toward continued miniaturization and increasing complexity is driving wider adoption of system-in-package (SiP) technology. One of the big benefits of [getkc id="199" kc_name="SiP"] is that it allows more features to be squeezed into ever-smaller form factors, such as wearable gadgets and medical implants. So while the individual chips in this package may ... » read more

Challenges For Future Fan-Outs


The fan-out wafer-level packaging market is heating up. At the high end, for example, several packaging houses are developing new fan-out packages that could reach a new milestone and hit or break the magic 1µm line/space barrier. But the technology presents some challenges, as it may require more expensive process flows and equipment like lithography. Fig. 1: Redistribution layers. Source: L... » read more

Start Your HBM/2.5D Design Today


High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. In June 2015, AMD introduced its Fiji processor, the first HBM 2.5D design, which comp... » read more

Wirebond Technology Rolls On


Several years ago, many predicted the demise of an older interconnect packaging technology called wire bonding, prompting the need for more advanced packaging types. Those predictions were wrong. The semiconductor industry today uses several advanced packaging types, but wire bonding has been reinvented over the years and remains the workhorse in packaging. For example, Advanced Semiconducto... » read more

How Testing MEMS, Sensors Is Different


When it comes to testing microelectromechanical system devices and sensors, sometimes you have to shake and bake. [getkc id="311" comment="MEMS"] and [getkc id="187" kc_name="sensors"] are physically different from standard ICs. They require a specific type of stimulus to get the required testing results. Most chips only need to have an electrical charge run through them to gauge their pass/... » read more

Electroplating IC Packages


The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

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