Automated Power Model Verification For Analog IPs

By Sierene Aymen and Hartmut Marquardt Creating macro power models for analog intellectual property (IP) blocks is essential to enable the chip assembly group to effectively integrate these blocks within their place and route environment. These macro models, which define power domains, identify IP ports as signal, power, ground, or trivial ports, and describe the associations of signal pins ... » read more

Design For IoT

In our already mind-bogglingly connected world where you can control your BMW with a Samsung smartwatch or monitor and pay your parking meter with a credit card on your smartphone, the semiconductor design community is mulling over the opportunities from design kits to embedded software as far as the best ways to equip design teams for the [getkc id="76" comment="Internet of Things"] (IoT) era.... » read more

Five Key Challenges In Designing With High-Speed Analog IP

There’s good reason why analog IC design is often considered to be more of an art than a science. Compared to their digital counterparts, analog components are much more sensitive to noise, distortion, and other errors. This white paper is filled with tips on meeting these challenges and speeding up your design cycle. To download this paper, click here. » read more