The Art Of LP Analog

The best way to reduce power in analog chips is to make architectural changes or adopt a new architecture for the individual block. However, there are also some design techniques used to reduce power in analog circuitry. Unlike digital circuitry, which allows an engineer to leverage a low power library and optimize through a constraints file with the EDA software to reduce power, the same do... » read more

Power And Noise Integrity For Analog/Mixed Signal Designs

The convergence of advance process technology, increasing levels of integration, and higher operating frequencies pose considerable challenge to IP designers whose circuits are required to function in variety of conditions. Full-custom and mixed signal circuit designers ensure that their circuits will function by simulating for various operating conditions (PVT, input stimuli, etc). One key asp... » read more

Good Times For Analog Designers

By Ann Steffora Mutschler For a number of technological reasons, analog/mixed-signal design and low-power design are converging, and with that comes both challenges and opportunities. As far as challenges go, process variations at 14nm, 20nm and even 28nm have increased significantly to include DFM impacts such as layout-delay effects. On the digital side, those process changes affect... » read more