Blog Review: April 26


Cadence's Paul McLellan provides an introduction to single-event effects and the challenges created when high-energy neutrons bombard chips. Synopsys' Robert Vamosi looks at the strange turf war between two worms battling for control of IoT security cameras. Mentor's Ayan Pahwa contends that it's the duty of IoT device developers to take security as paramount factor and provide good secur... » read more

Enabling Magnetic Tunnel Junctions Array Processing For Embedded STT MRAM


The semiconductor industry is entering a new era of next-generation memory technologies, with several major inflections taking shape. Among these is the emergence of Magnetic RAM (MRAM). Over several posts, I’ll provide background on what is driving the adoption of MRAM, highlight some of the initial challenges and discuss progress on making STT MRAM commerically viable. Today, a typical m... » read more

The Week In Review: Manufacturing


Fab tool vendors In the wafer fab equipment (WFE) rankings, Applied Materials was the leader in terms of market share in 2016, according to Gartner. For WFE, Lam Research jumped from fourth place in 2015 to second place in the rankings in 2016, according to Gartner. ASML was third, followed by TEL. Meanwhile, VLSI Research recently released its ranking for both front-end and backend equipment.... » read more

Moore’s Law: A Status Report


Moore's Law has been synonymous with "smaller, faster, cheaper" for the past 52 years, but increasingly it is viewed as just one of a number of options—some competing, some complementary—as the chip industry begins zeroing in on specific market needs. This does not make [getkc id="74" comment="Moore's Law"] any less relevant. The number of companies racing from 16/14nm to 7nm is higher t... » read more

The Week In Review: Manufacturing


Fab equipment and test VLSI Research has released its top 10 semiconductor equipment supplier ranking in terms of sales in 2016. Applied Materials topped the list again, achieving a growth of 18%. ASML was second, followed by Lam Research, TEL and KLA-Tencor. Fig. 1: Ranking based on 2016 sales. Source: VLSI Research. Unic Capital Management, a Chinese-based private equity fund, announ... » read more

Electroplating IC Packages


The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

The Week In Review: Manufacturing


Chipmakers At an event, Intel’s Technology and Manufacturing group outlined the company's vision. As part of the event, Intel reiterated what many are saying—the current node designations are meaningless and misleading. “For example, Intel estimates that its 14nm solution that has been out in the market since 2014 should be equal to 10nm solutions released by competitors in the near futu... » read more

Patterning Problems Pile Up


Chipmakers are ramping up 16nm/14nm finFET processes, with 10nm and 7nm now moving into early production. But at 10nm and beyond, chipmakers are running into a new set of problems. While shrinking feature sizes of a device down to 10nm, 7nm, 5nm and perhaps beyond is possible using current and future fab equipment, there doesn't seem to be a simple way to solve the edge placement error (EPE)... » read more

The Week In Review: Manufacturing


Chipmakers At this week’s TSMC Technology Symposium in San Jose, Calif., TSMC rolled out a dizzying array of new processes and technologies. Perhaps the most surprising announcement was a 22nm bulk CMOS process, which is geared for ultra low-power planar chips. The technology will compete against a 22nm FD-SOI technology from GlobalFoundries. Stay tuned. The battle has just begun. As e... » read more

Following Multiple Patterns


The lithography market is in flux. Today, chipmakers plan to extend today’s 193nm immersion lithography and multi-patterning to at least 10nm and 7nm. For the most critical layers, though, it’s unclear if optical lithography can extend beyond 7nm. For that reason, chipmakers hope to insert extreme ultraviolet (EUV) lithography at 7nm and/or 5nm. To get a handle on the state of patterning, S... » read more

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