Architecture, Materials And Software


AI, machine learning and autonomous vehicles will require massive improvements in performance, at the same power consumption level (or better), over today's chips. But it's obvious that the usual approach of shrinking features to improve power/performance isn't going to be sufficient. Scaling will certainly help, particularly on the logic side. More transistors are needed to process a huge i... » read more

Smaller, Faster, Cheaper—But Different


The old mantra of "smaller, faster, cheaper" has migrated from the chip level to the electronic system level, raising some interesting questions about where the real value is being generated. Smaller as it pertains to gate size, line widths and spaces, will continue in an almost straight line for at least the next decade. The ability to print three-dimensional features on a nanoscale using E... » read more

Verification Of Functional Safety


Functional safety is becoming a key part of chip design, and an increasingly problematic one for many engineering teams. Functional safety for electrical and electronic systems is nothing new. It has been an important element of the military, aerospace and medical industries for many years. But the growing importance of functional safety within the automobile industry presents a number o... » read more

Tech Talk: Verification


Frank Schirrmeister, Cadence's senior group director for verification platforms, talks about what's changing in verification with 5G, machine learning, greater connectivity, advanced packaging, and the growing need to build security into designs. https://youtu.be/GMF8BkmdJzE » read more

The Perfect (Silicon) Marriage… Yes, It Exists


Nope, this is not Dr. Phil masquerading as a tech blogger, trying to penetrate the semiconductor market. I am no Dr. Phil, but today, rather than expound on interconnect IP and how it relates to the various trends, applications, markets, etc., I would like to tell you a story about a relationship and share an experience with one of our customers, a leading manufacturer of autonomous systems. ... » read more

Security: Losses Outpace Gains


Paul Kocher, chief scientist in [getentity id="22671" e_name="Rambus'"] Cryptography Research Division, sat down with Semiconductor Engineering to discuss the new threats to security, artificial intelligence and machine learning, and how to engineer a secure system. What follows are excerpts of that conversation. SE: Where are we with security? It seems that rather than getting better, thing... » read more

Power State Switching Gets Tougher


Power state switching delay is a key factor in minimizing power, and getting it right frequently means the difference between a successful design and a dead chip. But tradeoffs are intricate, complex and often involve judgment calls, making this a place where designs can go completely awry. For years, traditional, full-swing [gettech id="31093" comment="CMOS"] process technologies were used ... » read more

Overcoming The Limits Of Scaling


Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

Architect Specs Harder To Follow


Interpreting and implementing architects' specifications is getting harder at each new process node, which is creating problems throughout the design flow, into manufacturing, and sometimes even post-production. Rising complexity and difficulties in scaling have pushed much more of the burden onto architects to deal with everything from complex power schemes, new packaging approaches, and to... » read more

Overcoming The Limits Of Scaling


Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

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