Advanced Packaging Requires Better Yield


Whether Moore's Laws truly ends, or whether the semiconductor industry reaches into the Angstrom world after 3nm—the semiconductor industry dislikes fractions—advanced packaging increasingly will dominate semiconductor designs. Apple already is on board with its iPhone 7, using TSMC's fan-out approach. And all of the major foundries and OSATs are lining up with a long list of capabilitie... » read more

The Week In Review: Manufacturing


Chipmakers At upcoming the 2016 IEEE International Electron Devices Meeting (IEDM) in San Francisco, TSMC will square off against the alliance of IBM, GlobalFoundries and Samsung at 7nm. IEDM will take place Dec. 3-7, 2016. TSMC will present a paper on 7nm finFET technology. Using 193nm immersion and multi-patterning, the 7nm technology features more than three times the gate density and ei... » read more

The Week In Review: Manufacturing


Fab tools and materials After a series of delays due to regulatory issues, Lam Research and KLA-Tencor have agreed to terminate their proposed merger agreement. Amid a possible proxy battle, Kulicke & Soffa Industries has named Fusen Chen as president and chief executive, effective Oct. 31. He was also elected to the board of K&S. Jonathan Chou, chief financial officer and interim CEO, w... » read more

Packaging Wars Begin


The advanced IC-packaging market is turning into a high-stakes competitive battleground, as vendors ramp up the next wave of [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D"] technologies, high-density fan-out packages and others. At one time, the outsourced semiconductor assembly and test ([getkc id="83" comment="OSAT"]) vendors dominated and handled the chip-packaging requirement... » read more

Stacked Die Changes


Semiconductor Engineering sat down to discuss advanced packaging with David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; John Hunt, senior director of engineering at ASE; and Sitaram Arkalgud, vice president of 3D portfolio and technologies at Invensas. ... » read more

Stacked Die Changes


Semiconductor Engineering sat down to discuss advanced packaging with David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; John Hunt, senior director of engineering at ASE; and Sitaram Arkalgud, vice president of 3D portfolio and technologies at Invensas. ... » read more

Stepping Back From Scaling


Architectures, packaging and software are becoming core areas for semiconductor research and development, setting the stage for a series of shifts that will impact a large swath of the semiconductor industry. While there is still demand from the largest chipmakers for increased density at the next process node, the underlying economics for foundries, equipment vendors and IP developers are f... » read more

China’s Capital Equipment Market To Boom


The worldwide semiconductor capital equipment market declined 3% last year to $36.53 billion from 2014’s $37.5 billion, but inside China the story was significantly different. Capital equipment sales there increased by 12% in 2015, to $4.9 billion. In fact, only Japan showed a higher growth rate last year, of 31%, according to figures from [getentity id="22821" comment="SEMI"] and the Semi... » read more

Stacked Die Changes


Semiconductor Engineering sat down to discuss advanced packaging with David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Max Min, senior technical manager at Samsung; John Hunt, senior director of engineering at ASE; and Sitaram Arkalgud, vice president of 3D portfolio and technologies at Invensas. What follows are excerpts of tha... » read more

Building Faster Chips


By Ed Sperling and Jeff Dorsch An explosion in IoT sensor data, the onset of deep learning and AI, and the commercial rollout of augmented and virtual reality are driving a renewed interest in performance as the key metric for semiconductor design. Throughout the past decade in which mobility/smartphone dominated chip design, power replaced performance as the top driver. Processors ha... » read more

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