tag: Bluespec

RISC-V Micro-Architectural Verification
By Brian Bailey - 21 Dec, 2023 - Comments: 3

RISC-V processors are garnering a lot of attention due to their flexibility and extensibility, but without an efficient and effective verification strategy, buggy implementations may lead to industry problems. Prior to RISC-V, processor verification almost became a lost art for most semiconductor companies. Expertise was condensed into the few commercial companies that provided processors or... » read more

RISC-V Wants All Your Cores
By Brian Bailey - 12 Oct, 2023 - Comments: 0

RISC-V is no longer content to disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition from entrenched players with deep-pocketed R&D operations and their well-constructed ecosystems. When Calista Redmond, CEO for RISC-V International, said at last year's summit that RISC-V w... » read more

Universal Verification Methodology Coverage For Bluespec RISC-V Cores
By Synopsys - 27 Sep, 2023 - Comments: 0

Attempting to achieve complete RISC-V verification requires multiple methodologies, one of which is coverage driven simulation based on UVM constrained random methods and complaint with the Universal Verification Methodology (UVM) standard. This whitepaper explains the basics of UVM functional coverage for RISC-V cores using the Google RISCV-DV open-source project, Synopsys verification solu... » read more

Chip Industry Week In Review
By The SE Staff - 15 Sep, 2023 - Comments: 0

By Gregory Haley, Jesse Allen, and Liz Allan TSMC told equipment vendors to delay deliveries of the most advanced tools due to uncertain demand, according to Reuters. The news drove down stock prices of all the major equipment providers. On the other hand, TSMC said advanced packaging shortages will constrain AI chip shipments for the next 18 months, according to NikkeiAsia. The United St... » read more

Understanding UVM Coverage For RISC-V Processor Designs
By Synopsys - 13 Sep, 2023 - Comments: 0

Attempting to achieve complete RISC-V verification requires multiple methodologies employing a wide range of relevant tools, including: • Coverage driven simulation based on UVM constrained random methods and compliant with the Universal Verification Methodology (UVM) standard • Static and formal property verification • Equivalence checking • Emulation and FPGA based verific... » read more

Week In Review: Design, Low Power
By Jesse Allen - 30 Jun, 2023 - Comments: 0

Keysight Technologies said it intends to acquire ESI Group for €913 million (~$998.6 million). ESI Group provides virtual prototyping solutions for the automotive and aerospace end markets that can create real-time digital twins to simulate a product's behavior during testing and real-life use. MLCommons announced the latest results from two MLPerf benchmark suites. One aims to measure the... » read more

Not All There: Heterogeneous Multiprocessor Design Tools
By Brian Bailey - 26 Jun, 2023 - Comments: 0

The design, implementation, and programming of multicore heterogeneous systems is becoming more common, often driven by the software workloads, but the tooling to help optimize the processors, interconnect, and memory are disjointed. Over the past few years, many tools have emerged that help with the definition and implementation of a single processor, optimized for a given set of software. ... » read more

Software-Defined Hardware Architectures
By Brian Bailey - 31 May, 2023 - Comments: 0

Hardware/software co-design has been a goal for several decades, but success has been limited. More recently, progress has been made in optimizing a processor as well as the addition of accelerators for a given software workload. While those two techniques can produce incredible gains, it is not enough. With increasing demands being placed on all types of processing, single-processor solutio... » read more

Week In Review: Design, Low Power
By Jesse Allen - 13 Jan, 2023 - Comments: 0

With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; an... » read more

Week In Review: Design, Low Power
By Jesse Allen - 01 Oct, 2021 - Comments: 0

Valens Semiconductor began trading on the New York Stock Exchange as VLN after a merger with special-purpose acquisition company (SPAC) PTK Acquisition Corp. Valens offers high-speed connectivity chips for the audio-video and automotive markets, including its HDBaseT technology for connectivity between ultra-HD video sources and remote displays and its in-vehicle high-speed links. The transacti... » read more

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