Measuring FinFETs Will Get Harder

The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is the most difficult process for finFETs. But another process, metrology, is fast becoming one of the biggest challenges for the next-generation transistor technology. In fact, [getkc id="252" kc_n... » read more

Inside X-ray Metrology

Chipmakers are ramping up a new class of chip architectures, such as 3D NAND and finFETs. Measuring and characterizing the tiny structures in these technologies is a major challenge. It will not only take the traditional metrology tools, but also various X-ray techniques. To get a handle on X-ray metrology, Semiconductor Engineering recently discussed the trends with the following experts: ... » read more

The Week In Review: Manufacturing

Is the sky falling in the IC equipment market? Not yet, but watch out below. Semi capital spending is expected to reach $60.37 billion in 2015, down 1% from 2014, according to Pacific Crest Securities. “Although we trimmed 2016 capex three weeks ago, we are trimming some more. We now see semiconductor capex down 4% in 2016. However, we do not see capex falling off a cliff in 2016 (i.e., down ... » read more

Waiting For 3D Metrology

By Mark LaPedus Over the years, suppliers of metrology equipment have managed to meet the requirements for conventional planar chips. But tool vendors now find themselves behind in the emerging 3D chip era, prompting the urgent need for a new class of 3D metrology gear. 3D is a catch-all phrase that includes a range of new architectures, such as finFET transistors, 3D NAND and stacked-die ... » read more