Follow The Moving Money


Semiconductor economics are changing by market, by region, and by product node and packaging type, adding new complexity into decisions about which technology to use for which products and why. Money is the common denominator in all of these decisions, whether it's measured by return on invested capital, quarterly profits, or long-term investments that can include acquisitions, organic growt... » read more

Predictions: Manufacturing, Devices And Companies


Some predictions are just wishful thinking, but most of these are a lot more thoughtful. They project what needs to happen for various markets or products to become successful. Those far reaching predictions may not fully happen within 2018, but we give everyone the chance to note the progress made towards their predictions at the end of the year. (See Reflection On 2017: Design And EDA and Man... » read more

Blog Review: Jan. 17


Mentor's Puneet Sinha identifies the key challenges, along with cost reduction and optimization opportunities, that come with using electric powertrains in autonomous vehicles. Synopsys' Robert Vamosi examines the impact of limited cellular networks on autonomous cars, and new communications protocols that could address coverage gaps. Cadence's Paul McLellan listens in as Lucian Shifren o... » read more

Data Buffering’s Role Grows


Data buffering is gaining ground as a way to speed up the processing of increasingly large quantities of data. In simple terms, a data buffer is an area of physical [getkc id="22" kc_name="memory"] storage that temporarily stores data while it is being moved from one place to another. This becomes increasingly necessary in data centers, autonomous vehicles, and for [getkc id="305" kc_name=... » read more

The Week In Review: Design


M&A Synopsys acquired one-time programmable non-volatile memory IP provider Kilopass. Founded in 2001, Kilopass' 1T and 2T bitcell IP supports up to 4-Mbit OTP instances in 180-nm to 7-nm process technologies. The acquisition will add to Synopsys' growing OTP NVM portfolio: last October, Synopsys acquired Sidense, another provider of the technology. Terms of the deal were not disclosed. ... » read more

Turning Down The Power


Chip and system designers are giving greater weight to power issues these days. But will they inevitably hit a wall in accounting for ultra-low-power considerations? Performance, power, and area are the traditional attributes in chip design. Area was originally the main priority, with feature sizes constantly shrinking according to Moore's Law. Performance was in the saddle for many years. M... » read more

Self-Driving Cars And Kobayashi Maru


Kobayashi Maru. If you know what I am talking about, you are a bona fide Star Trek fan. If not, let me indulge. Kobayashi Maru is a computer simulation for a training exercise in the fictional Star Trek universe, where Starfleet Academy cadets are presented with a no-win scenario. But they do have to make a decision. The primary goal of the exercise is to rescue a disabled civilian vessel... » read more

Machine Learning’s Growing Divide


[getkc id="305" kc_name="Machine learning"] is one of the hottest areas of development, but most of the attention so far has focused on the cloud, algorithms and GPUs. For the semiconductor industry, the real opportunity is in optimizing and packaging solutions into usable forms, such as within the automotive industry or for battery-operated consumer or [getkc id="76" kc_name="IoT"] products. ... » read more

Predictions: Markets And Drivers


Semiconductor Engineering received a record number of predictions this year. Some of them are just wishful thinking, but many are a lot more thoughtful and project what needs to happen for various markets or products to become successful. Those far reaching predictions may not fully happen within 2018, but we give everyone the chance to note the progress made towards their predictions at the en... » read more

Methodology For Analyzing And Quantifying Design Style Changes And Complexity Using Topological Patterns


In order to maximize yield, IC design companies spend a lot of effort to analyze what types of design styles are needed and used in their layouts (standard cells, macros, routing layers, and so forth). This paper introduces a novel methodology for full chip high performance topological pattern analysis and the applications of this methodology towards analyzing design styles in order to quanti... » read more

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