Is 7nm The Last Major Node?


A growing number of design and manufacturing issues are prompting questions about what scaling will really look like beyond 10/7nm, how many companies will be involved, and which markets they will address. At the very least, node migrations will go horizontally before proceeding numerically. There are expected to be more significant improvements at 7nm than at any previous node, so rather th... » read more

The Future Of MEMS Design: Making MEMS Design More Like CMOS Design


MEMS-based component suppliers want to rapidly ramp their designs into high-volume production. This demand is driving MEMS suppliers to focus on ways to more efficiently re-use established process steps, stacks or technology platforms. To meet this need, we see the emergence of standard MEMS technology and design platforms similar to those used in CMOS design. The semiconductor industry and ... » read more

Blog Review: July 19


Synopsys' Prishkrit Abrol provides a detailed explanation of how the USB Type-C connector works. Mentor's Ricardo Anguiano examines how the RISC-V ecosystem is expanding and latest developments in the open source toolchain. Cadence's Gopi Krishnamurthy explains the lane margining requirements of the PCIe 4.0 specification. ARM's Chet Babla unravels some claims about Narrowband IoT, Cat... » read more

Hybrid Emulation


Semiconductor Engineering sat down to discuss the growing usage of hybrid verification approaches with Frank Schirrmeister, senior group director of product management & marketing for [getentity id="22032" e_name="Cadence"]; Russ Klein, program director for pre-silicon debug products at [getentity id="22017" e_name="Mentor, a Siemens Business"]; [getperson id="11027" comment="Phil Moorby"],... » read more

What Does An IoT Chip Look Like?


By Ed Sperling and Jeff Dorsch Internet of Things chip design sounds like a simple topic on the face of it. Look deeper, though, and it becomes clear there is no single IoT, and certainly no type of chip that will work across the ever-expanding number of applications and markets that collectively make up the IoT. Included under this umbrella term are sensors, various types of processors, ... » read more

Dealing With System-Level Power


Analyzing and managing power at the system level is becoming more difficult and more important—and slow to catch on. There are several reasons for this. First, design automation tools have lagged behind an understanding of what needs to be done. Second, modeling languages and standards are still in flux, and what exists today is considered inadequate. And third, while system-level power ha... » read more

The Week In Review: Design


M&A Ansys acquired Computational Engineering International (CEI), the developer of a suite of products that helps analyze, visualize and communicate simulation data. Founded in 1994 as a spin-off from Cray Research, the company's program covers a wide range of data formats. Terms of the deal were not disclosed. IP Efabless launched an open source framework that allows community members... » read more

Transistor Aging Intensifies At 10/7nm And Below


Transistor aging and reliability are becoming much more troublesome for design teams at 10nm and below. Concepts like ‘infant mortality’ and 'bathtub curves' are not new to semiconductor design, but they largely dropped out of sight as methodologies and EDA tools improved. To get past infant mortality, a burn-in process would be done, particularly for memories. And for reliability, which... » read more

Is The IP Industry Healthy?


The semiconductor industry has been through many changes, each designed to reduce the total cost associated with the design and manufacture of chips. Twenty years ago, most companies had their own fabs and designed all of the circuitry on each chip. Today, only a handful of companies still own a fab and outsourcing design, in the form of intellectual property ([getkc id="43" kc_name="IP"]), has... » read more

Blog Review: July 12


Mentor's Puneet Sinha points to five big engineering stumbling blocks in building commercially-viable autonomous vehicles. Synopsys' Anders Nordstrom checks out some exotic applications of formal verification. Cadence's Paul McLellan listens in on a talk by Cadence's Michelle (Xuehong) Mao on how the company's deep neural network, CactusNet, works for optimizing network architecture. S... » read more

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