Can We Measure Next-Gen FinFETs?


After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

Measuring Atoms And Beyond


David Seiler, chief of the Engineering Physics Division within the Physical Measurement Laboratory at the National Institute of Standards and Technology (NIST), sat down with Semiconductor Engineering to discuss the current and future directions of metrology. NIST, a physical science laboratory, is part of the U.S. Department of Commerce. What follows are excerpts of that conversation. SE: W... » read more

Measuring FinFETs Will Get Harder


The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is the most difficult process for finFETs. But another process, metrology, is fast becoming one of the biggest challenges for the next-generation transistor technology. In fact, [getkc id="252" kc_n... » read more

Inside X-ray Metrology


Chipmakers are ramping up a new class of chip architectures, such as 3D NAND and finFETs. Measuring and characterizing the tiny structures in these technologies is a major challenge. It will not only take the traditional metrology tools, but also various X-ray techniques. To get a handle on X-ray metrology, Semiconductor Engineering recently discussed the trends with the following experts: ... » read more

Waiting For Next-Gen Metrology


Chipmakers continue to march down the various process nodes, but the industry will require new breakthroughs to extend IC scaling at 10nm and beyond. In fact, the industry will require innovations in at least two main areas—patterning and the [getkc id="36" comment="Interconnect"]. There are other areas of concern, but one technology is quickly rising near the top of the list—metrology.... » read more

Gaps In Metrology Could Impact Yield


For some time, chipmakers have been developing new and complex chip architectures, such as 3D NAND, finFETs and stacked die. But manufacturing these types of chips is no simple task. It requires a robust fab flow to enable new IC designs with good yields. In fact, yield is becoming a more critical part of the flow. Yield is a broad term that means different things to different parts of the ... » read more

Challenges Mount In Inspection And Metrology


Chipmakers are moving full speed ahead toward smaller process nodes, thereby driving up the costs and complexities in chip manufacturing. The migrations also are putting enormous stress on nearly all points of the fab flow, including a critical but unsung part of the business—process control. Process control involves 20 or so different segments in the inspection and metrology arena. Genera... » read more

Wanted: New Metrology Funding Models


By Mark LaPedus The shift toward the 20nm node and beyond will require new and major breakthroughs in chip manufacturing. Most of the attention centers around lithography, gate stacks, interconnects, strain engineering and design-for-manufacturing (DFM). Lost in the conversation are two other critical but overlooked pieces in the manufacturing puzzle—wafer inspection and metrology. ... » read more