White-Box Fuzzer With Static Analysis To Detect And Locate Timing Vulnerabilities In RISC-V Processors 


A technical paper titled “WhisperFuzz: White-Box Fuzzing for Detecting and Locating Timing Vulnerabilities in Processors” was published by researchers at Indian Institute of Technology Madras, Texas A&M University, and Technische Universität Darmstadt. Abstract: "Timing vulnerabilities in processors have emerged as a potent threat. As processors are the foundation of any computing s... » read more

LLMs For Hardware Design Verification


A technical paper titled “LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation” was published by researchers at University of Cambridge, lowRISC, and Imperial College London. Abstract: "Test stimuli generation has been a crucial but labor-intensive task in hardware design verification. In this paper, we revolutionize this process by harnessing the power of large langua... » read more

Test Connections Clean Up With Real-Time Maintenance


Test facilities are beginning to implement real-time maintenance, rather than scheduled maintenance, to reduce manufacturing costs and boost product yield. Adaptive cleaning of probe needles and test sockets can extend equipment lifetimes and reduce yield excursions. The same is true for load board repair, which is moving toward predictive maintenance. But this change is much more complicate... » read more

The Essential Signal Generator Guide Building A Solid Foundation In RF — Part 1


Eliminate uncertainties and doubts from your test results with a reliable signal source. Engineers designing consumer wireless, military communications, or radar devices face an ongoing bandwidth crunch in spectrum filled with interference. An accurate signal generator offers precise and stable test signals for characterizing your device under test (DUT). It also lets you apply impairments t... » read more

Coping With Parallel Test Site-to-Site Variation


Testing multiple devices in parallel using the same ATE results in reduced test time and lower costs, but it requires engineering finesse to make it so. Minimizing test measurement variation for each device under test (DUT) is a multi-physics problem, and it's one that is becoming more essential to resolve at each new process node and in multi-chip packages. It requires synchronization of el... » read more

Managing Wafer Retest


Every wafer test touch-down requires a balance between a good electrical contact and preventing damage to the wafer and probe card. Done wrong, it can ruin a wafer and the customized probe card and result in poor yield, as well as failures in the field. Achieving this balance requires good wafer probing process procedures as well as monitoring of the resulting process parameters, much of it ... » read more

What is STS Software Bundle?


The STS Software Bundle provides all the software tools and hardware drivers you need to efficiently develop and deploy test programs, interactively debug, and maintain and calibrate the NI Semiconductor Test System (STS). NI will release new bundles regularly to incorporate new functionality and hardware drivers. The STS Software Bundle includes tools for interactive measurements and debugg... » read more

Massively Parallel System-Level Testing


Decades of advances in the semiconductor industry continue to drive an insatiable consumer demand for smaller, more powerful, more ubiquitous devices – whether in our cars, on our countertops or around our wrists. To meet this demand now and into the future, the fabrication of increasingly complex semiconductor systems for an incredible spectrum of applications must scale accordingly. Additio... » read more

Testing the Big Bang of Smart Devices


Thanks to the proliferation of smart devices in the Internet of Things (IoT), it’s a circumstance not unlike the overwhelming sense of wonder and bewilderment that ancient Greek astronomer Ptolemy must have felt when gazing up at a sky full of stars on a clear winter’s night, trying to rationalize the vast tableau before him. But just as we wouldn’t critique early astronomers and philo... » read more

U.V.M. Spells Relief


Verification can be a challenging endeavor. As designs grow in size and complexity, engineers are having difficulty confirming their designs behave properly. This is where UVM may provide some relief. UVM aims to deliver an easier and more flexible way of creating robust test environments so that you can verify those difficult designs effortlessly. So what is UVM? UVM is a verification meth... » read more

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