DVCon Europe: 2 Days Of Verification Presentations To Enthusiastic Attendees


Design verification was on full display last week in Munich, Germany, as DVCon Europe offered two full days of more than 30 sessions. Attendees could choose from 16 tutorials, two panels, three keynotes and 16 technical presentations or wander through a small but active exhibit floor, with exhibitors that included OneSpin. The conference for engineers by engineers is meant to be educational,... » read more

The Week In Review: Design


IP Synopsys rolled out verification IP for mobile PCIe, including built-in M-PHY, for UVM environments. Cadence introduced MIPI SoundWire controller IP, which allows bi-directional digital communication using low gate count and minimal complexity. Deals ARM and TSMC rolled out a road map for 64-bit ARM-based processors at 10nm. The companies said the early pathfinding work is expected t... » read more

Blog Review: April 2


Mentor’s Nazita Saye compares roadway roundabouts to networked systems. One roundabout works fine, but add in a bunch of them and you have a massive traffic jam. How many roundabouts are in your design? Cadence’s Richard Goering interviews Stan Kroliskoski, chair of the IEEE Design Automation Standards Committee, about four working groups on EDA standards and what’s ahead. Speaking ... » read more

Get Ready For DVCon Europe


By Martin Barnasconi DVCon Europe, a new conference and exhibition around design and verification, will be held Oct. 14-15 in Munich, Germany. Call for abstracts for DVCon Europe is open through April 8. The obvious question is why DVCon Europe. DVCon and its predecessor conferences have been held successfully in the Silicon Valley for more than 20 years. The conference is extremely success... » read more