The Week In Review: Design

Tools Aldec uncorked its TySOM embedded development kit, which includes Riviera-PRO mixed-HDL language simulation for VHDL 2008/Verilog 2005, a Xilinx Zynq-based development board and pre-validated Ubuntu Embedded Host reference designs and tutorials. Mentor Graphics introduced the first phase of its new Xpedition PCB design flow with technologies for design and verification of rigid and ... » read more

System-Level Verification Tackles New Role

Semiconductor Engineering sat down to discuss advances in system-level verification with Larry Melling, product management director for the system verification group of [getentity id="22032" e_name="Cadence"]; Larry Lapides, vice president of sales for [getentity id="22036" e_name="Imperas”] and Jean-Marie Brunet, director of marketing for the emulation division of [getentity id="22017" e_nam... » read more

An Unsustainable Divide

One of the great things about attending DVCon, or any other conference for that matter, is the networking. You get to see so many people who are eager to learn, to talk and to share ideas. When this happens, you tend to hear a lot of statements that have to rattle around in your mind for a while before you can start to make sense of them and see if any coherent themes emerge. By themes, I am... » read more

Verification Facing Unique Inflection Point

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

Powerful New Standard

In December 2015, the IEEE released the latest version of the 1801 specification, titled the IEEE standard for design and verification of low-power integrated circuits, but most people know it as UPF or the Unified Power Format. The standard provides a way to specify the power intent associated with a design. With it, a designer can define the various power states of the design and the contexts... » read more

Blog Review: Feb. 10

You could be flying on a hybrid plane that uses hydrogen fuel cells in the future, and might even be able to hear the loudspeaker announcements while waiting for the flight, in this week's top tech picks from Ansys' Justin Nescott. Plus, smart soccer balls. Thermal is the new power, argues Cadence's Paul McLellan, and when it comes to SoCs treating thermal analysis as an afterthought is no l... » read more

Still Time to Blow Up UVM

Blowing up UVM is something I ran on my own blog a few years ago. Considering not much has changed with respect to UVM – that it continues to dominate verification circles – I figured it’s a discussion worth re-starting. In my mind, it’s not too late to take a few steps forward by blowing up UVM. A little history… the idea to blow up UVM was motivated by a slide snapshot posted to ... » read more

The Week In Review: Design/IoT

Tools Rambus' Cryptography Research Division uncorked a new security platform for protecting and sharing 4K UHD and high dynamic range programming. It allows consumers to store, copy and share digital content across multiple devices, while also protecting the content from theft. Included are a secure core, a software player, and trusted key provisioning. Deals Arrow and Cadence announc... » read more

Blog Review: Sept. 30

In an increasingly networked world, NXP's Lars Reger advocates for a change of perspective: one which places data protection and the security of end customers and users at the heart. Differential power analysis has been on the mind of Rambus' Aharon Etengoff recently as increasing numbers of SIM cards are being cracked, plus some counter measures that can be used. Even wondered about the ... » read more

The Week In Review: Design/IoT

M&A Tessera boosted its 2.5D and 3D-IC capabilities with the acquisition of Ziptronix. The $39 million cash purchase adds a low-temperature wafer bonding technology platform, which has been licensed to Sony for volume production of CMOS image sensors. Numbers Semico Research forecasts that the SoC market will approach $200 billion by 2019. According to its analysis, average die are... » read more

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