The “Last Simple Node” And the Internet of Things

Power, performance and size are key targets that will enable the expected explosion of the Internet of Things (IoT). Today, most observers see the path to that running directly through 16/14nm finFET and below for the node’s ability to manage power and size and boost integration. Geoff Lees isn’t your average observer. The vice president and general manager of Freescale’s microcon... » read more

Reflecting on the Future

Since returning from the Design Automation Conference, I’ve been reflecting on some very interesting discussions I had last week in Austin. The ones that are sticking with me concern the old, sequential algorithms that run EDA tools today. The fact is, given design complexity, they are running out of steam. As a result, the industry is looking at possibly leveraging GPUs since they may be ... » read more

Experts At The Table: Pain Points

By Ed Sperling Low-Power/High-Performance Engineering sat down with Vinod Kariat, a Cadence fellow; Premal Buch, vice president of software engineering at Altera; Vic Kulkarni, general manager of Apache Design; Bernard Murphy, CTO at Atrenta, and Laurent Moll, CTO at Arteris. What follows are excerpts of that conversation. LPHP: With stacked die it’s no longer one company making an SoC. W... » read more