Tech Talk: 5/3nm Parasitics


Ralph Iverson, principal R&D engineer at Synopsys, talks about parasitic extraction at 5/3nm and what to expect with new materials and gate structures such as gate-all-around FETs and vertical nanowire FETs. https://youtu.be/24C6byQBkuI » read more

Chip Aging Accelerates


Reliability is becoming an increasingly important proof point for new chips as they are rolled out in new markets such as automotive, cloud computing and industrial IoT, but actually proving that a chip will function as expected over time is becoming much more difficult. In the past, reliability generally was considered a foundry issue. Chips developed for computers and phones were designed ... » read more

New Thermal Issues Emerge


Thermal monitoring is becoming more critical as gate density continues to increase at each new node and as chips are developed for safety critical markets such as automotive. This may sound counterintuitive because the whole point of device scaling is to increase gate density. But at 10/7 and 7/5nm, static current leakage is becoming a bigger issue, raising questions about how long [getkc id... » read more

Pushing Performance Limits


Trying to squeeze the last bit of performance out of a chip sounds like a good idea, but it increases risk and cost, extends development time, reduced yield, and it may even limit the environments in which the chip can operate. And yet, given the amount of margin added at every step of the development process, it seems obvious that plenty of improvements could be made. "Every design can be o... » read more

Tech Talk: Applying Machine Learning


Norman Chang, chief technologist at ANSYS, talks about real applications of machine learning for mechanical, fluid dynamics and chip-package-system design. https://youtu.be/MqYX0wbwSfE » read more

The Week In Review: Design


M&A Synopsys finalized its acquisition of Black Duck Software, which provides software for managing and securing open source software in projects, adding to Synopsys' burgeoning software analysis and security business. The cash deal was approximately $547 million net of cash acquired. STMicroelectronics acquired Atollic, maker of the Eclipse-based TrueSTUDIO Integrated Development Envir... » read more

3D Neuromorphic Architectures


Matrix multiplication is a critical operation in conventional neural networks. Each node of the network receives an input signal, multiplies it by some predetermined weight, and passes the result to the next layer of nodes. While the nature of the signal, the method used to determine the weights, and the desired result will all depend on the specific application, the computational task is simpl... » read more

How To Build An IoT Chip


Semiconductor Engineering sat down to discuss IoT chip design issues with Jeff Miller, product marketing manager for electronic design systems in the Deep Submicron Division of [getentity id="22017" e_name="Mentor, a Siemens Business"]; Mike Eftimakis, IoT product manager in [getentity id="22186" e_name="Arm"]'s Systems and Software Group; and John Tinson, vice president of sales at Sondrel Ltd... » read more

Improving Automotive Reliability


Semiconductor reliability requirements are rapidly evolving. New applications such as ADAS/self-driving cars and drones are pushing the limits for system reliability. A mobile phone that overheats in your pocket is annoying. In automobiles, it's a much different story. Overheating can impact the operation of backup sensors, which alert the driver that a pedestrian or obstacle is behind them.... » read more

New Power Concerns At 10/7nm


As chip sizes and complexity continues to grow exponentially at 7nm and below, managing power is becoming much more difficult. There are a number of factors that come into play at advanced nodes, including more and different types of processors, more chip-package decisions, and more susceptibility to noise of all sorts due to thinner insulation layers and wires. The result is that engineers ... » read more

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