What “Hamilton – An American Musical” Tickets And Emulation Have In Common


During a recent trip to New York, I managed to see “Hamilton, An American Musical”—despite the running joke about how hard it is to get tickets. The sale of “Hamilton” tickets teaches an interesting lesson about what I would call an “automatic feedback loop of value adjustment”. And believe it or not, it bears some resemblance to how verification users actually choose what engine ... » read more

Need Emulation Now? You’ve Got It


Did you know that the way companies use hardware emulation has changed? Until recently, companies had no choice but to house their emulators in a lab and hard wire them (using lots of wires) to other supporting hardware and workstations dedicated to a single project at a time. The emulator and its set up was accessible to users at only that location and switching between projects was difficu... » read more

Toward Real-World Power Analysis


The expansion of emulation into new fields, rather than just functional verification, is making it possible to do power analysis over longer spans of time. The result is a fast and effective way to analyze real-world scenarios. This is a new field, and it marks a new use of this technology. While it is still evolving, several ideas have surfaced about the best methodology and the best way to... » read more

24 x 7 Productivity


Emulators are now managed as a corporate-wide shared resource in a datacenter, but standard job management software does not allow companies to take full advantage of emulator resources and capabilities. The Veloce Enterprise Server App (Veloce ES) delivers a fully-integrated solution for complete, transparent access to emulation resources for concurrent projects worldwide. It significantly enh... » read more

“Eating Your Own Dog Food” When Developing An Emulator


It’s a great week for emulation week with ARM TechCon happening in Silicon Valley. Palladium Z1 is a finalist for Best Product in the categories “Best Chip” and “Best System” and we started the week with an announcement that Fujitsu adopted the Cadence Palladium Z1 Enterprise Emulation Platform for their ARMv8-based “Post-K Supercomputer Development.” Cadence has faced some of the... » read more

Too Big To Simulate?


With system design complexity set on a steady upward trajectory, there are situations in which traditional simulation just can’t keep up. The alternative—and one being used by Google, Uber, Ford, GM, Volvo, Audi and others with autonomous vehicles— is to test cars on the road and collect data for later analysis. “They're not simulating, they're just doing it all in the real world ... » read more

Emulation’s Footprint Grows


It wasn't that many years ago that [getkc id="30" comment="emulation"] was an expensive tool available to only a few, but it has since become indispensable for a growing number of companies. One obvious reason is the growing size of designs and the inability of [getkc id="11" kc_name="simulation"] to keep up. But emulation also has been going through a number of transformations that have made i... » read more

How Software-Driven Tests Support Concurrent Power/Performance Analysis


There’s always been an intimate relationship between performance and power—and it’s one that is acutely affected by architecture. Architectural innovation can yield orders of magnitude improvements in performance/power metrics. For example, we’ve seen a growing popularity in multi-core and heterogeneous core systems with purpose-specific hardware accelerators. These configurations are o... » read more

Power Limits Of EDA


Power has become a major gating factor in semiconductor design. It is now the third factor in design optimization, along with performance, and is almost becoming more important than area. But there are limits to the amount of help that [getkc id="7" kc_name="EDA"] can provide with [getkc id="106" kc_name="power optimization"]. Power is not just an optimization problem. It is a design problem... » read more

Deterministic ICE App Tackles ICE Limitations


Historically, SoC verification has used In-Circuit Emulation (ICE) to exercise the design under test (DUT) by connecting physical targets to an emulator. ICE delivers the advantage of being able to run real-world usage scenarios before tape-out. However, an ICE-based verification environment is hampered by several inherent limitations. It is restricted to trigger- and waveform-based debug. W... » read more

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