tag: emulation

Selecting The Right RISC-V Core
By Brian Bailey - 16 Jan, 2023 - Comments: 0

With an increasing number of companies interested in devices based on the RISC-V ISA, and a growing number of cores, accelerators, and infrastructure components being made available, either commercially or in open-source form, end users face an increasingly difficult challenge of ensuring they make the best choices. Each user likely will have a set of needs and concerns that almost equals th... » read more

Taking Power Much More Seriously
By Brian Bailey - 10 Nov, 2022 - Comments: 0

An increasing number of electronic systems are becoming limited by thermal issues, and the only way to solve them is by elevating energy consumption to a primary design concern rather than a last-minute optimization technique. The optimization of any system involves a complex balance of static and dynamic techniques. The goal is to achieve maximum functionality and performance in the smalles... » read more

Verification Scorecard: How Well Is The Industry Doing?
By Brian Bailey - 25 Aug, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss how well verification tools and methodologies have been keeping up with demand, with Larry Lapides, vice president of sales for Imperas Software; Mike Thompson, director of engineering for the verification task group at OpenHW; Paul Graykowski, technical marketing manager for Arteris IP; Shantanu Ganguly, vice president of product marketing at Caden... » read more

Power Methodology For Estimation And Optimization In The ASIC/SoC Flow
By Siemens EDA - 24 Aug, 2022 - Comments: 0

In this white paper, we’ll review the many steps of today’s common ASIC/SoC power methodologies and tool flows. We’ll then propose ways you can further optimize your power methodology to more quickly achieve your PPW goals. Please note, while we acknowledge that energy consumption in digital CMOS logic is a combination of dynamic power and leakage, to keep this white paper to a digestible... » read more

Challenges Grow For Modeling Auto Performance, Power
By Ann Mutschler - 17 Aug, 2022 - Comments: 0

Rising complexity in automobiles is creating huge challenges about how to add more safety and comfort features and electronics into vehicles without reducing the overall range they can travel or pricing them so high that only the rich can afford them. While the current focus is on modeling hardware and software to understand interactions between systems, this remains a huge challenge. It req... » read more

Fast and Flexible FPGA-based NoC Hybrid Emulation
By Technical Paper Link - 14 Jul, 2022 - Comments: 0

Researchers from RWTH Aachen University and Otto-von-Guericke Universitat Magdeburg have published a new technical paper titled "EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs." Abstract: "Networks-on-Chips (NoCs) recently became widely used, from multi-core CPUs to edge-AI accelerators. Emulation on FPGAs promises to accelerate their RTL modeling co... » read more

Customization, Heterogenous Integration, And Brute Force Verification
By Ed Sperling - 14 Jul, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

Who Does Processor Validation?
By Brian Bailey - 27 Jun, 2022 - Comments: 1

Defining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling with the implications of hundreds of heterogenous processing elements crammed into a single chip or package. Companies have extensive verification methodologies, but not for validation. Verification is a process of ensuring that an implementation matches a specif... » read more

Emulation-Centric Power Analysis Of SoC Designs
By Lauro Rizzatti - 09 Jun, 2022 - Comments: 0

Verification expert Lauro Rizzatti recently interviewed Jean-Marie Brunet, senior marketing director, Scalable Verification Solutions Division (SVSD), Siemens EDA, about the importance of accurate power estimation and optimization for system-on-chip (SoC) designs. What is the problem facing the semiconductor industry today regarding pre-silicon power estimation? The problem is the discrep... » read more

Automotive Bandwidth Issues Grow As Data Skyrockets
By Ann Mutschler - 02 Jun, 2022 - Comments: 0

Bandwidth requirements for future vehicles are set to explode as the amount of data moving within vehicles, between vehicles, and between vehicles and infrastructure, continues to grow rapidly. That data will be necessary for a variety of functions, some of which are here today and many of which are still in development. On the safety side, that includes everything from early warning systems... » read more

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